Figure 2.10Rtc Battery - Advantech FWA-1320 User Manual

Please refer to section 3.5.2 reg. replacing the coin battery.
2. Serial Ports
The SoC integrates two 16C550 compliant UARTs which are mapped to the default
resources:
Table 2.13: COM Ports
UART Port
0 COM1
1 COM2
Please note that the UARTs in the SoC do not support any UART handshake and sta-
tus/control signals but RXD, TXD, only.
3. HPET
The High Precision Event Timer (HPET) provides a set of timers that are used by the
operating system for timing events. One timer block is implemented, containing one
counter and three timers. It complies with the IA-PC HPET (High Precision Event
Timers) Specification, Revision 1.0 available from intel.
4. SMBus
The PCH integrates two SMBus controllers. The first one is used as interface to
external devices such as EEPROMs, the hardware monitor; the second controller is
not used on the FWA-1320.
Table 2.14: SMBus Devices
SMBus Adr,
0 0x5C/5D
0 0xA0/A1
FWA-1320 User Manual
Figure 2.10 RTC battery
Resources
IO Range 0x3f8 -0x3ff, IRQ4
IO Range 0x2f7 – 0x2ff, IRQ3
Device
NCT7904D
DIMM A0 SPD
24
Implementation
Console port
Interface to LCM
Function
Hardware monitor chip
SPD EEPROM