17
16
15
R[7:0]
Figure 6-8 Build-in Display Modes of the HDMI TX Demonstration
A set of display modes are implemented for presenting the generated video patterns. The module
"Video Source Selector" controls the selection of current video timing among build-in display
modes listed in
Table
alternatively via the KEY1 push button.
Table 6-1 Build-in Display Modes of the HDMI TX Demonstration
In the VPG module, the Altera IP "PLL Reconfig" is used to set up pixel frequency of
corresponding mode to the Altera IP "PLL." The RECONFIG data for each clock frequency is
originated from the "PLL Controller." The source of the VPG module is located at the
"C5G_HDMI_VPG\vpg_source" folder.
14
13
12
11
6-1. The module "Mode Control" allows users to switch current display mode
Pattern ID
Video Format
0
640x480@60P
1
720x480@60P
2
1024x768@60P
3
1280x1024@60P
4
1920x1080@60P
5
1600x1200@60P
Pixel Data [23:0]
10
9
8
7
6
G[7:0]
PCLK (MHZ)
25
27
65
108
148.5
162
76
5
4
3
2
1
B[7:0]
0
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