Terasic DE0-Nano-SoC Getting Started Manual
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Terasic DE0-Nano-SoC Getting Started Manual

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DE0-Nano-SoC Getting Started
www.terasic.com.tw
1
Guide
May 18, 2015

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Summary of Contents for Terasic DE0-Nano-SoC

  • Page 1 DE0-Nano-SoC Getting Started www.terasic.com.tw Guide May 18, 2015...

  • Page 2: Table Of Contents

    ....................... 14 NSTALLING THE LASTER RIVER 4.3 D FPGA SRAM O ......................15 OWNLOADING A BJECT RUNNING LINUX ON THE DE0-NANO-SOC BOARD CHAPTER 5 ............... 20 5.1 I ................................. 20 NTRODUCTION 5.2 C SD C ......................... 20 REATING A MICRO MAGE 5.3 S...
  • Page 3 ....................... 14 NSTALLING THE LASTER RIVER 4.3 D FPGA SRAM O ......................15 OWNLOADING A BJECT RUNNING LINUX ON THE DE0-NANO-SOC BOARD CHAPTER 5 ............... 20 5.1 I ................................. 20 NTRODUCTION 5.2 C SD C ......................... 20 REATING A MICRO MAGE 5.3 S...

  • Page 4: Chapter 1 About This Guide

    Chapter 1 About this Guide The DE0-Nano-SoC Getting Started Guide contains a quick overview of the hardware and software setup including step-by-step procedures from installing the necessary software tools to using the DE0-Nano-SoC board. The main topics that this guide covers are listed below: ...

  • Page 5: Chapter 2 Software Installation

    Altera FPGAs. The Quartus II software is the primary FPGA development tool used to create reference designs along with the Nios II soft-core embedded processor integrated development environment User can download the latest software from https://www.altera.com/download/dnl-index.jsp DE0-Nano-SoC Getting Started www.terasic.com.tw Guide May 18, 2015...
  • Page 6  Use your existing login, or get a one-time Access.  Download files from subscription or web edition page. You must download the Quartus II Software (includes Nios II EDS) and Cyclone V device support (includes all variations). DE0-Nano-SoC Getting Started www.terasic.com.tw Guide...
  • Page 7  After the file is downloaded on the computer, select the *.exe file, and install the software. All of the defaults are to be used. DE0-Nano-SoC Getting Started www.terasic.com.tw Guide May 18, 2015...

  • Page 8: Installing Altera S O C Embedded Design Suite

    (https://www.altera.com/download/software/soc-eds)  Browse the webpage to get the same information as the picture shows below, click the “activation code (Web Edition or 30-Day Evaluation) to link to the webpage: “DS-5 Community Edition". DE0-Nano-SoC Getting Started www.terasic.com.tw Guide May 18, 2015...
  • Page 9  A Workspace Launcher window will ask you to select a workspace.  Press OK to select the default  You will see a "No Licenses Found" Window. Select Open License Manager DE0-Nano-SoC Getting Started www.terasic.com.tw Guide May 18, 2015...
  • Page 10  Press the Add License Button in the ARM License Manager and Enter the activation code that you received earlier. Press the Next Button.  Use the pull down menu to select a host ID. Press the Next button. DE0-Nano-SoC Getting Started www.terasic.com.tw Guide...
  • Page 11  If you do not have an account then click on the link to create one.  Press the Finish button.  A web edition license or 30-day evaluation license for subscription edition is now successfully installed. DE0-Nano-SoC Getting Started www.terasic.com.tw Guide May 18, 2015...

  • Page 12: Chapter 3 Development Board Setup

    Chapter 3 Development Board Setup The instructions in this section explain how to set up the DE0-Nano-SoC development board. The following pictures show the board overview of DE0-Nano-SoC board. The FPGA Configuration Mode Switch (MSEL) shown in Figure 3-1 is by default set to 10010 (MSEL[4:0] = 10010).

  • Page 13: Usb And Power Cables

    2. Connect the supplied DE0-Nano-SoC power adapter to the power connector (J14) on the DE0-Nano-SoC board. At this point, you should see the 3.3V indicator LED (LED9) turned on. DE0-Nano-SoC Getting Started www.terasic.com.tw...

  • Page 14: Chapter 4 Performing A Fpga System Test

    2. Power up the board and open the device manager in Windows. You will find an unknown device. 3. Select the unknown device to update the driver software. The driver file is in the \<Quartus II installation directory>\drivers\ usb-blaster-ii directory. DE0-Nano-SoC Getting Started www.terasic.com.tw Guide...

  • Page 15: Downloading Afpga Sram Object File

    If users would like to program their SRAM Object File (.sof) into the Cyclone V SOC FPGA device on the DE0-Nano-SoC board, There are two devices (FPGA and HPS) on the JTAG Chain, the configure flow is different from the one used with DE0-Nano. The following shows the programming flow with JTAG mode step by step.
  • Page 16 Click Hardware Setup. If DE-SoC [USB-1] does not appear under Currently Selected Hardware, select that option and click Close as shown below. DE0-Nano-SoC Getting Started www.terasic.com.tw Guide May 18, 2015...
  • Page 17 If the USB-Blaster II does not appear under hardware options list, please confirm if the USB-Blaster II driver has been correctly installed, and the USB cable has been properly connected between the DE0-Nano-SoC board and host computer. 5. Click “Auto Detect”.
  • Page 18 7. FPGA and HPS devices are all show in the jtag chain. 8. Click the FPGA device, click “Change File..”, and then select .sof file for FPGA DE0-Nano-SoC Getting Started www.terasic.com.tw Guide May 18, 2015...
  • Page 19 9. Select \<CD directory>\Demonstration\FPGA\my_first_fpga\ output_files\my_first_fpga.sof. Click “Program/Configure” check box, and then click “Start” button to download .sof file into FPGA DE0-Nano-SoC Getting Started www.terasic.com.tw Guide May 18, 2015...

  • Page 20: Chapter 5 Running Linux On The De0-Nano-Soc Board

    This chapter demonstrates how to create a Micro SD card image, set up a UART Terminal, and run Linux on DE0-Nano-SoC Board. User can download the latest SD Card image file from Terasic’s website (Choose Linux Console in Linux BSP (Board Support Package)): http://cd_de0-nano-soc.terasic.com.

  • Page 21: Setting U Puart Terminal

    5. Click “write” to start writing the image file to the microSD card. Wait until the image is written successfully. This section presents how to install the drivers for the USB to UART chip on the DE0-Nano-SoC board and set up the UART terminal on your host PC. The DE0-Nano-SoC board communicates with the PC through the micro USB connector J4.You should install the USB to UART driver and...
  • Page 22 Windows 7 are: 1. Connect your computer to the development board by plugging the USB cable into the micro USB connector (J4) of DE0-Nano-SoC (connection shown in Figure 3-2 2. Power on the board then open the computer device manager in Windows. You will find an unrecognized FT232R USB UART.
  • Page 23 4. Now you can power off the DE0-Nano-SoC board  UART terminal spec:  115200 baud rate  no parity  1 stop bit  no flow control settings The following steps present how to configure a PuTTY terminal window (can be downloaded from the link: http://the.earth.li/~sgtatham/putty/latest/x86/putty.exe)

  • Page 24: Running Linux On De0-Nano -S O Cboard

    This section presents how to run the pre-built Linux images on the DE0-Nano-SoC board. You can run the Linux by following the steps below: 1. Insert the microSD card with the pre-built image into the board (See Section to prepare a microSD card) 2.
  • Page 25 DE0-Nano-SoC Getting Started www.terasic.com.tw Guide May 18, 2015...

  • Page 26: Additional Information

    4 6 H 4 6 H Web: w ww.terasic.com 4 7 H 4 7 H Date Version Changes 2015.01.08 V1.0 First Version 2015.05.18 V1.1 Minor corrections: fixing typos and broken links DE0-Nano-SoC Getting Started www.terasic.com.tw Guide May 18, 2015...

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