Cpu-1 - EUROCOM M660N Service Manual

Schematic Diagrams

CPU-1

Sheet 3 of 40
Layout note: no stub
on H_STPCLK TP
CPU-1
A#[32-39], APM#[0-1]:
Leave ascape routing on for
future functionality
+VDD3
23 TERM_REST#
H_THERMDA
H_THERMDC
B - 4 CPU-1
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5 H_A#[31:3]
U34A
H_A#3 J4 H1
A[3]# ADS#
H_A#4 L4 E2
A[4]# BNR#
H_A#5 M3 G5
A[5]# BPRI#
H_A#6 K5
A[6]#
H_A#7 M1 H5
A[7]# DEFER#
H_A#8 N2 F21
A[8]# DRDY #
H_A#9 J1 E1
A[9]# DBSY #
H_A#10 N3
A[10]#
H_A#11 P5 F1
A[11]# BR0#
H_A#12 P2
A[12]#
H_A#13 L1 D20
A[13]# IERR#
H_A#14 P4 B3
A[14]# INIT#
H_A#15 P1
A[15]#
H_A#16 R1 H4
A[16]# LOCK#
L2
5 H_ADSTB#0 ADSTB[0]#
B1
5 H_REQ#[4:0]
RESET#
H_REQ#0 K3 F3
REQ[0]# RS[0]#
H_REQ#1 H2 F4
REQ[1]# RS[1]#
H_REQ#2 K2 G3
REQ[2]# RS[2]#
H_REQ#3 J3 G2
REQ[3]# TRDY #
H_REQ#4 L5
REQ[4]#
G6
5 H_A#[31:3]
HIT#
H_A#17 Y 2 E4
A[17]# HITM#
H_A#18 U5
A[18]#
H_A#19 R3 AD4
A[19]# BPM[0]#
H_A#20 W6 AD3
A[20]# BPM[1]#
H_A#21 U4 AD1
A[21]# BPM[2]#
H_A#22 Y 5 AC4
A[22]# BPM[3]#
H_A#23 U2 AC2
A[23]# PRDY #
H_A#24 R4 AC1
A[24]# PREQ#
H_A#25 T5 AC5
A[25]# TCK
H_A#26 T3 AA6
A[26]# TDI
H_A#27 W3 AB3
A[27]# TDO
H_A#28 W5 AB5
A[28]# TMS
H_A#29 Y 4 AB6
A[29]# TRST#
H_A#30 W2 C20
A[30]# DBR#
H_A#31 Y 1
A[31]#
V4 D21
5 H_ADSTB#1 ADSTB[1]# PROCHOT#
A24
THERMDA
A6 A25
14 H_A20M# A20M# THERMDC
A5
14 H_FERR# FERR#
C4 C7
14 H_IGNNE# IGNNE# THERMTRIP#
D5
14 H_STPCLK# STPCLK#
C6
14 H_INTR LINT0
B4 A22
14 H_NMI LINT1 BCLK[0]
A3 A21
14 H_SMI# SMI# BCLK[1]
TP_A32# AA1
RSVD[01]
TP_A33# AA4 T22
RSVD[02] RSVD[12]
TP_A34# AB2
RSVD[03]
TP_A35# AA3
RSVD[04]
TP_A36# M4 D2
RSVD[05] RSVD[13]
TP_A37# N5 F6
RSVD[06] RSVD[14]
TP_A38# T2 D3
RSVD[07] RSVD[15]
TP_A39# V3 C1
RSVD[08] RSVD[16]
TP_APM0# B2 AF1
RSVD[09] RSVD[17]
TP_APM1# C3 D22
RSVD[10] RSVD[18]
C23
RSVD[19]
TP_HEPLL B25 C24
RSVD[11] RSVD[20]
Y onah Ball-out
THM_VDD
Q43 R479
S D Z0310 0
AO3409
G
Z0309
R481 100K_04
R468 C486
Q45
G 100K_04 0.1U_04
2N7002
F950102
R474 C490
10K 0.1UF
R467 0_04 U33
1 8
VDD SCLK
Z0307
C491 2 7
D+ SDATA
Z0308 Z0306
3 6 C
D- ALERT#
1000PF Z0305 4 5
THERM# GND
R466 0_04
ADM1032
FOR Costdown
Please testpoint on
H_ADS# 5
+1.05VS
H_IERR# with a GND
H_BNR# 5
H_BPRI# 5 0.1" away
R89
H_DEFER# 5
H_DRDY # 5
H_DBSY# 5 5 H_D#[63:0]
56
H_BREQ#0 5
Z0301
H_INIT# 14
H_LOCK# 5
H_CPURST# 5
H_RS#[2:0] 5
H_RS#0
H_RS#1
H_RS#2
H_TRDY# 5
H_HIT# 5
H_HITM# 5
5 H_DSTBN#0
XDP_BPM#0
5 H_DSTBP#0
XDP_BPM#1
5 H_DINV#0
XDP_BPM#2
5 H_D#[63:0]
XDP_BPM#3
XDP_BPM#4 +1.05VS
XDP_BPM#5
XDP_TCK
XDP_TDI R90
XDP_TDO
XDP_TMS PM_THRMTRIP# should
XDP_TRST#
connect to ICH7 and GMCH
XDP_DBRESET# 56
without T-ing(No STUB)
H_PROCHOT#
H_THERMDA +1.05VS
H_THERMDC
PM_THRMTRIP# 6,14,23
R505
5 H_DSTBN#1
1K_1%
5 H_DSTBP#1
CLK_CPU_BCLK 2 5 H_DINV#1
CLK_CPU_BCLK# 2
TP_EXTBREF
R473
R506
TP_SPARE0 R472
TP_SPARE1 2K_1%
TP_SPARE2
TP_SPARE3
Layout note:Zo=55ohm,0.5"
2 CPU_BSEL0
TP_SPARE4 max for GTLREF
2 CPU_BSEL1
TP_SPARE5
2 CPU_BSEL2
TP_SPARE6
TP_SPARE7
+3VS
R91
150
XDP_DBRESET#
+VDD3
R469 R475 R478
10K
10K 10K
XDP_TCK
THERMAL_SCLK1 23
THERMAL_SDA1 23
PM_THRM#
A
PM_THRM# 16
D48 RB751V
+3VS 2,6,9,11,12,13,14,16,17,18,19,20,21,23,24,25,26,27,28,30,32,33,34
+1.5VS 4,6,8,9,15,16,17,20,25,28
+1.05VS 2,4,5,9,14,17,32
+3VH8 22,23,25,31,34
+VDD3 15,16,20,23,25,26,29,30,31,32,34
U34B
H_D#[63:0] 5
H_D#0 E22 AA23 H_D#32
D[0]# D[32]#
H_D#1 F24 AB24 H_D#33
D[1]# D[33]#
H_D#2 E26 V24 H_D#34
D[2]# D[34]#
H_D#3 H22 V26 H_D#35
D[3]# D[35]#
H_D#4 F23 W25 H_D#36
D[4]# D[36]#
H_D#5 G25 U23 H_D#37
D[5]# D[37]#
H_D#6 E25 U25 H_D#38
D[6]# D[38]#
H_D#7 E23 U22 H_D#39
D[7]# D[39]#
H_D#8 K24 AB25 H_D#40
D[8]# D[40]#
H_D#9 G24 W22 H_D#41
D[9]# D[41]#
H_D#10 J24 Y 23 H_D#42
D[10]# D[42]#
H_D#11 J23 AA26 H_D#43
D[11]# D[43]#
H_D#12 H26 Y 26 H_D#44
D[12]# D[44]#
H_D#13 F26 Y 22 H_D#45
D[13]# D[45]#
H_D#14 K22 AC26 H_D#46
D[14]# D[46]#
H_D#15 H25 AA24 H_D#47
D[15]# D[47]#
H23 W24
DSTBN[0]# DSTBN[2]# H_DSTBN#2 5
G22 Y 25
DSTBP[0]# DSTBP[2]# H_DSTBP#2 5
J26 V23
H_DINV#2 5
DINV[0]# DINV[2]#
H_D#[63:0] 5
H_D#16 N22 AC22 H_D#48
D[16]# D[48]#
H_D#17 K25 AC23 H_D#49
D[17]# D[49]#
H_D#18 P26 AB22 H_D#50
D[18]# D[50]#
H_D#19 R23 AA21 H_D#51
D[19]# D[51]#
H_D#20 L25 AB21 H_D#52
D[20]# D[52]#
H_D#21 L22 AC25 H_D#53
D[21]# D[53]#
H_D#22 L23 AD20 H_D#54
D[22]# D[54]#
H_D#23 M23 AE22 H_D#55
D[23]# D[55]#
H_D#24 P25 AF23 H_D#56
Layout note:
D[24]# D[56]#
H_D#25 P22 AD24 H_D#57 Comp0,2 connect with Zo=27.4ohm,make
D[25]# D[57]#
H_D#26 P23 AE21 H_D#58
trace length shorter than 0.5"
D[26]# D[58]#
H_D#27 T24 AD21 H_D#59
Comp1,3 connect with Zo=55ohm,make
D[27]# D[59]#
H_D#28 R24 AE25 H_D#60
trace length shorter than 0.5"
D[28]# D[60]#
H_D#29 L26 AF25 H_D#61
D[29]# D[61]#
H_D#30 T25 AF22 H_D#62
D[30]# D[62]#
H_D#31 N24 AF26 H_D#63
D[31]# D[63]#
M24 AD23
DSTBN[1]# DSTBN[3]# H_DSTBN#3 5
N25 AE24
H_DSTBP#3 5
DSTBP[1]# DSTBP[3]#
M26 AC20
H_DINV#3 5
DINV[1]# DINV[3]#
Z0302
AD26 R26 COMP0 R482 27.4_1%
GTLREF COMP[0]
U26 COMP1 R484 54.91%
MISC
COMP[1]
U1 COMP2 R499 27.4_1%
COMP[2]
Z0303
*1K C26 V1 COMP3 R501 54.9_1%
TEST1 COMP[3]
Z0304
51 D25 E5
TEST2 DPRSTP# H_DPRSTP# 14,32
B5
DPSLP# H_DPSLP# 14
D24
H_DPWR# 5
DPWR#
B22 D6
BSEL[0] PWRGOOD H_PWRGD 14
B23 D7
BSEL[1] SLP# H_CPUSLP# 5,14
C21 AE6
PM_PSI# 32
BSEL[2] PSI#
TP3F1 Place Series
Layout:Connect test NO_STUFF Resistor on
point TP3F1 with no
H_PWRGD_XDP Without
atub
stub
Yonah Ball-out
H_CPURST#
XDP_BPM#5
XDP_BPM#4
XDP_BPM#3
XDP_BPM#2
XDP_BPM#1
XDP_BPM#0
XDP_TDI
XDP_TMS
XDP_TDO
PM_THRM#
R115 54.9_1% R113 54.9_1% XDP_TRST#
IN-Target Probe
+1.05VS
R93 *51_1%
R503 54.9_1%
R502 51_1%
R118 51_1%
R507 51_1%
R119 51_1%
R116 51_1%
R112 54.9_1%
R114 54.9_1%
R117 75
R491 10K