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Jcc
Operation:
If cc, then 0xxx
else PC+1
If cc, then ea
PC
else PC+1
Description: Jump to the location in program memory given by the instruction's effective
address if the specified condition is true. If the specified condition is false, the program
counter (PC) is incremented and the effective address is ignored. However, the address
register specified in the effective address field is always updated independently of the
specified condition. All memory alterable addressing modes may be used for the effec-
tive address. A Fast Short Jump addressing mode may also be used. The 12-bit data is
zero extended to form the effective address. See A.8 INSTRUCTION SEQUENCE
RESTRICTIONS for restrictions. The term ''cc'' may specify the following conditions:
CC (HS)
— carry clear (higher or same)
CS (LO)
— carry set (lower)
EC
— extension clear
EQ
— equal
ES
— extension set
GE
— greater than or equal
GT
— greater than
LC
— limit clear
LE
— less than or equal
LS
— limit set
LT
— less than
MI
— minus
NE
— not equal
NR
— normalized
PL
— plus
NN
— not normalized
where
U denotes the logical complement of U,
+
denotes the logical OR operator,
•
denotes the logical AND operator, and
⊕
denotes the logical Exclusive OR operator
MOTOROLA
Freescale Semiconductor, Inc.
Jump Conditionally
PC
PC
PC
''cc'' Mnemonic
DSP56000/DSP56001 USER'S MANUAL
For More Information On This Product,
Go to: www.freescale.com
Assembler Syntax:
Jcc xxx
Jcc xxx
Condition
C=0
C=1
E=0
Z=1
E=1
⊕
N
V=0
⊕
Z+(N
L=0
⊕
Z+(N
L=1
⊕
N
V=1
N=1
Z=0
•
Z+(U
E)=1
N=0
•
Z+(U
E)=0
Jcc
V)=0
V)=1
A - 77
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