CHIP4e+ Manual
DMA
DMA0
DMA1
DMA2
DMA3
DMA5
DMA6
DMA7
DMA channels 0-3 are 8-bit; 5-7 are 16-bit. When the ECP option is enabled one of
the 8-bit DMA channels is used.
Memory Map
Table 0-5 shows the CHIP4e+ memory map. The I/O designation refers to memory
viewed as part of the AT bus.
Address Range (hex)
FFFE0000 - FFFFFFFF
F8000000 - FFFEFFFF
80000000 - F7FFFFFF
08000000 - 7FFFFFFF
04000000 - 07FFFFFF
00100000 - end of DRAM
000F0000 - 000FFFFF
000E0000 - 000EFFFF
000D0000 - 000DFFFF
000CC000- 000CFFFF
000C0000 - 000CBFFF
000A0000 - 000BFFFF
00000000 - 0009FFFF
16
Function
Unused (Could be used for EPP/ECP parallel port option)
Unused
Floppy Controller
Unused (Could be used for EPP/ECP parallel port option)
Unused
Unused
Unused
Table 0-5. Memory Map
Size
Device
128 Kbytes
System BIOS
~128 Mbytes
Allocated to PCI bus by BIOS or operating system
15 x 128 Mbytes
128 Mbytes blocks of F8000000-FFFFFFFF
(shadowed 15 times)
15 x 128 Mbytes
128 Mbytes blocks of 0-07FFFFFF (shadowed 15 times)
64 Mbytes
Allocated to PCI bus by BIOS or operating system
DRAM
64 Kbytes
System BIOS
64 Kbytes
System BIOS
64 Kbytes
AT bus I/O
16 Kbytes
DOC2000 or Battery-backed SRAM option
48 Kbytes
VGA BIOS
128 Kbytes
VGA DRAM memory
640 Kbytes
DRAM
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