Table Of Contents - Advantech PCIE-1750U User Manual

Contents
Chapter 1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
Chapter 2
2.1
2.2
2.3
2.4
Chapter 3
3.1
3.2
3.3
Appendix A
A.1
Appendix B
B.1
Overview...............................................1
Introduction ............................................................................................... 2
Features .................................................................................................... 2
Applications............................................................................................... 3
Installation Guide ...................................................................................... 3
Software Overview .................................................................................... 4
Accessories............................................................................................... 4
Ordering Information: ................................................................................ 4
Hardware Installation
Installation ................................................................................................. 6
Unpacking ................................................................................................. 6
Driver Installation ...................................................................................... 7
Hardware Installation ................................................................................ 7
Figure 2.1 Device Manager ......................................................... 8
Signal Connections
Overview ................................................................................................. 10
Switch and Jumper Settings.................................................................... 10
Figure 3.1 Card layout of PCIE-1750U/UH................................ 10
Table 3.1: Summary of Jumper Settings (JP2).......................... 10
Table 3.2: Board ID setting (SW1)............................................. 11
Signal Connections ................................................................................. 12
Figure 3.2 Pin assignment of PCIE-1750U/UH......................... 12
Figure 3.3 Isolated DI Connection ............................................. 13
Figure 3.4 Sink type (NPN) connection ..................................... 13
Figure 3.5 Source type (PNP) connection ................................. 14
Figure 3.6 Wrong connection wouldn't damage the IDO compo-
nent........................................................................... 14
Figure 3.7 Pin definition of CN2................................................. 15
Specifications
Specifications .......................................................................................... 18
A.1.1 Isolated Digital Input ................................................................... 18
A.1.2 Isolated Digital Output................................................................. 18
A.1.3 General ....................................................................................... 19
A.1.4 Digital Filter Time ........................................................................ 19
Block Diagram
PCIE-1750U/UH...................................................................................... 22
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PCIE-1750U/UH User Manual