Eembc ® Coremark; Figure 69. System Information Module; Figure 70. Eembc ® Coremark ® Application - ST STM32CubeH7 User Manual

Functional description of the STM32H745I-DISCO demonstration modules
9.3 EEMBC
®
EEMBC
microcontrollers (MCUs) and central processing units (CPUs) used in embedded systems.
This application shows the STM32H745 device Cortex-M7 and Cortex-M4 scores based on
this benchmark.
A simple touch on the screen starts the benchmark simultaneously on both Cortex-M7 and
Cortex-M4 and displays the score on real STM32H745 device giving:
•
~2020 CoreMarks for Cortex-M7
•
~583 CoreMarks for Cortex-M4
Algorithm Conditions:
•
CPU frequency: Cortex-M7 @ 400MHZ, Cortex-M4 @ 200MHZ
•
Code: Cortex-M7 Flash Bank1, Cortex-M4 Flash Bank2
•
RW data: Cortex-M7 in DTCM, Cortex-M4 in D2 domain SRAM
•
Cortex-M7 L1-Cache ON, Cortex-M4 ART ON
•
Number of iterations: Cortex-M7 25000, Cortex-M4 10000
•
Compiler: IAR embedded workbench for ARM 7.80
68/76

Figure 69. System information module

® ®
CoreMark
Figure 70. EEMBC
®
CoreMark is a benchmark that measures the performance of the
® ®
CoreMark application
UM2222 Rev 2
UM2222