Basic Test Procedure; Test Block Diagram With Adc32Xx And Adc34Xx; Adc32Xx/Adc34Xx And Tsw1400 Test Setup Block Diagram - Texas Instruments ADC3EVM User Manual

Basic Test Procedure

3 Basic Test Procedure
This section outlines the basic test procedure for testing the EVM. There are 2 test platforms which can be
used: (1) TSW1400 with ADC32xx and ADC34xx and (2) TSW14J56 or TSW14J50 with ADC32Jxx and
ADC34Jxx.
3.1

Test Block Diagram with ADC32xx and ADC34xx

Figure 15 shows the test set-up for evaluation of the ADC3xxxx EVM with the TSW1400 Capture Card. As
seen in this figure, the evaluation setup involves a clock from a high-quality signal generator and a sine
wave for the analog input from a high-quality signal generator. High order, narrow bandpass filters are
usually required on clock and input frequencies to remove phase noise and harmonic content from the
input sine waves. If the two signal generators are not synchronized by an external reference signal to
make the clock and input frequency coherent, then the resulting fast Fourier transform (FFT) will first need
to have a windowing function such as Blackman-Harris/Hamming/Hanning applied to the data.
PC
USB
Figure 15. ADC32xx/ADC34xx and TSW1400 Test Setup Block Diagram
24
ADC3xxxEVM and ADC3xJxxEVM
USB Mini-B
J5
To A, B, C, D
Channels
CHA
J1
BPF
Synchronized
Sources
Signal Generator
(Input Source)
Copyright © 2014–2018, Texas Instruments Incorporated
TSW1400
J3
J15
J5
CHD
J8
CLK
CHB CHC
J9
J4 J5
BPF
Signal
Generator
(CLK Source)
SLAU579D – June 2014 – Revised August 2018
+5V
J12
+5V
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