Basic Test Procedure; Test Block Diagram; Ads58H40 And Tsw1400 Test Setup Block Diagram - Texas Instruments ADS58H40 User Manual

Basic Test Procedure

3 Basic Test Procedure
This section outlines the basic test procedure for testing the EVM.
3.1

Test Block Diagram

The test set-up for evaluation of the EVM with the TSW1400 Capture Card is shown in
in this figure, the evaluation setup involves a clock from a high-quality signal generator and a sine wave
for the analog input from a high-quality signal generator. High-order, narrow-bandpass filters are usually
required on clock and input frequency to remove phase noise and harmonic content from the input sine
waves. If the two signal generators are not synchronized by an external reference signal to make the clock
and input frequency coherent, then the resulting FFT first needs a windowing function, such as Hanning or
Blackman-Harris, applied to the data.
PC
USB Mini-B
USB
USB Mini-B
USB
Signal Generator
(Input Source)
Figure 8. ADS58H40 and TSW1400 Test Setup Block Diagram
10
ADS58H40 EVM
J5
J4
To A, B, C, D
Channels
CHA
J6
CHB
BPF
Synchronized
Sources
Copyright © 2012, Texas Instruments Incorporated
TSW1400
J3
J5
CHD
J13
CLK
J10
CHC
J8 J11
BPF
Signal
Generator
(CLK Source)
www.ti.com
Figure 8. As seen
J12
+5 V
J1
+6 V
SLAU455 – August 2012
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