Enxcnt] (Counter Register); Enxmcmp] (Mcmp Comparison Register) - Toshiba TXZ Series Reference Manual

4.2.4. [ENxCNT] (Counter Register)

Bit Bit Symbol
31:0 CNT[31:0]

4.2.5. [ENxMCMP] (MCMP Comparison Register)

Bit Bit Symbol
31:0 MCMP[31:0]
Note: In Sensor mode (Timer count) or Timer counter mode, the comparison mode of [ENxTNCR]register
<MCMPMD> is set to the magnitude comparison, and [ENxMCMP] value is updated at the same time
when MCMP comparison is met, MCMP comparison met interrupt is not generated by the updated
[ENxMCMP] value. MCMP comparison met flag [ENxINTF]<MCMPIF> is not set, either.
2018-10-11
After Reset Type
[Encoder mode and Sensor mode (Event count)]
The counter value of the rotation edge pulses can be read.
[Sensor mode (Timer count and Phase count)]
The captured value of the internal counter by the rotation edge
pulse (ENCLK) can be read. Or the captured value of the internal
counter by writing [ENxTNCR]<SFTCAP> to "1" in software can
be read.
[Timer mode and Phase counter mode (Phase measurement)]
0x00000000 R
<SFTCAP> should be set to "1" to read the software-captured
value of the internal counter. When [ENxTNCR]<ZEN>=1, the
capture is also done by the edge of ENCxZ (ZDETECT timing) set
by [ENxTNCR]<ZESEL>.
[Phase counter mode(Phase difference measurement)]
The software-captured value of the internal counter by writing
<SFTCAP> to "1" can be read. When <ZEN>=<P3EN>=1, the
capture is also done by the edge of ENCxPSGI (ZDETECT timing)
set by <ZESEL>.
After Reset Type
[Sensor mode (Timer count) and Timer mode]
When the comparison condition with the counter value is met,
[ENxINTF]<MCMPF> is set to "1".When [ENxINTCR]
<MCMPIE>=1, an interrupt (INTENCx1) is generated.
Magnitude comparison mode ([ENxTNCR]<MCMPMD>=1)
When <MCMP> ≥ counter value is met, one pulse is
generated.
* Only one pulse is generated per writing to the register.
Match comparison mode ([ENxTNCR]<MCMPMD>=0)
When the counter value matches this value, the match signal is
generated.
0x00000000 R/W
[Encoder mode and Sensor mode (Event count)
When the comparison condition with the counter value is met,
[ENxINTF]<MCMPF> is set to "1".When [ENxINTCR]
<MCMPIE>=1, an interrupt (INTENCx1) is generated.
[Sensor mode (Phase count) and Phase counter mode]
When the comparison condition with the counter value is met,
[ENxINTF]<MCMPF> is set to "1".When [ENxINTCR]
<MCMPIE>=1, an interrupt (INTENCx1) is generated.
When it is set that RELOAD match counter stops at
[ENxTNCR]<TOVMD>=1, do not set to <MCMP>=[ENxRELOAD].
Advanced Encoder Input Circuit(32-bit)
Description
Description
45 / 55
TXZ Family
Rev. 1.1