Toshiba TXZ Series Reference Manual page 20

TXZ Family
Advanced Encoder Input Circuit(32-bit)
"0x00000000", the counter value is set to [ENxRELOAD] value.
When <ENCLR> is set to "1", the counter is cleared to "0x00000000".
When <TOVMD>=1 is set, the counter stops at the value in [ENxRELOAD].
The counter value is captured by ENCLK. The captured value can be read through [ENxCNT] register.
When <SFTCAP> is set to "1", the counter value is captured. The capture can be done at any timing. The captured
value can be read through [ENxCNT] register.
The value in [ENxCNT] register (the captured value) is kept regardless of the value of <ENRUN>.
When the rotation direction is detected as CW, <UD> is set to "1", and detected as CCW, set to "0". <UD> is
cleared to "0" when <ENRUN>=0.
When the rotation direction changes, <REVERR>=1 is set. The flag is cleared by reading itself.
[ENxTNCR]<DECMD> can set the rotation direction to CW only or CCW only. When <DECMD> is not "00",
the rotation edge is detected by comparing the input state ([ENxINPMON]<DETMONA>, <DETMONB>, and
<DETMONZ>) stored at the previous edge detection with the current input values.
When [ENxINTCR]<CMPIE>=1 and the counter value becomes [ENxINT] value, INTENCx1 interrupt can be
generated.
When [ENxINTCR]<MCMPIE>=1 and the counter value becomes [ENxMCMP] value, INTENCx1 interrupt can
be generated.
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2018-10-11 Rev. 1.1