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Firmware
Global Results
PPC/PMC-8260/DS1
The POST information is stored in the following twelve 32-bit words:
Table 15: POST Result Storage Area
Offset Relative to Dual-Ported RAM: B800
Offset (hex)
00
04
08
0C
10
14
18
1C
20
24
28
2C
The POST result code (PRC) is set and each bit represents one of the eight tests
being executed, plus an additional "global POST failure" bit (0).
Table 16: POST Result and Status Bits
Offset: 00
16
Bit
Description
0 (lsb)
POST Failure. Set to 1 if at least one device failed the tests
1..3
Not used
4
Set to 1 if framer #1 passed all tests
5
Set to 1 if framer #2 passed all tests
6
Set to 1 if framer #3 passed all tests
7
Set to 1 if framer #4 passed all tests
8
Set to 1 if the T8105 passed all tests
9
Set to 1 if the PowerSpan II PCI bridge passed all tests
Obtaining Results from the Power-On Self-Test
16
Content
POST result code (PRC)
Checksum
SDRAM test results
SSRAM test results
PowerSpan II test results
Framer #1 test results
Framer #2 test results
Framer #3 test results
Framer #4 test results
Lucent T8105 test results
Reserved (zero)
Reserved (zero)
4 - 25
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