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PowerSPAN II PCI Bus Bridge
Opening Windows in the 60x Bus Slave Channel
5 - 14
The PowerSPAN II provides eight 60x bus slave images to map 60x bus cycles to
the PCI bus. No window is opened by the default settings in the E
enable the PMC module to access the PCI bus and memory of the carrier board, the
following basic programming steps are necessary to set up a 60x bus slave image:
1. Program PB_SIx_BADDR register with 60x bus base address
2. Program PB_SIx_TADDR register with PCI base address
3. Set translation attributes and enable translation in PB_SIx_CTL register
4. Ensure that P1_CSR[BM] bit is set to allow PCI mastership to Power-
SPAN II
This is usually done by the PCI enumerator
The following programming example for 60x bus slave image 1 shows the register
contents necessary to map 256 MBytes of 60x bus space, beginning at address
20000000
to PCI memory space address 0.
16
Table 27: 60x Bus Slave Image#0 Programming Example
PowerSPAN II
Register Contents
Register
PB_SI0_BADDR
20000000
PB_SI0_TADDR
00000008
PB_SI0_CTL
D0000040
P1_CSR
02B00006
Comment
60x bus address: 20000000
16
PCI memory space address: 00000000
16
Mx = 1: Claim transactions from all masters.
IMG_EN = 1: Image enabled
16
TA_EN = 1: Translation enabled
MD_EN = 0: Master decode disabled
BS = 10000
2
MODE = 0: Map to PCI memory space
PRKEEP = 0: Do not keep prefetched data.
END = 10
: Big endian data format
2
RD_AMT = 0: 8 byte prefetch
MS = 1: Memory space enable
16
BM = 1: Bus master enable
Memory Map and Devices
2
PROM. To
16
16
: Block size 256 MByte
PPC/PMC-8260/DS1
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