Motorola MVME2300 Series Installation And Use Manual page 42

Preparation and Installation
1
1-22
Chapter 4, Programming. D8 and/or D16 devices in the system must be
handled by the PowerPC processor software. Refer to the memory maps in
Chapter 4,
Programming.
The module contains shared onboard DRAM whose base address is
software-selectable. Both the onboard processor and off-board VMEbus
devices see this local DRAM at base physical address $00000000, as
programmed by the PPCBug firmware. This may be changed via software
to any other base address. Refer to the MVME2300 Series VME Processor
Module Programmer's Reference Guide for more information.
If the module tries to access off-board resources in a nonexistent location
and is not system controller, and if the system does not have a global bus
timeout, the module waits forever for the VMEbus cycle to complete. This
will cause the system to lock up. There is only one situation in which the
system might lack this global bus timeout: when the module is not the
system controller and there is no global bus timeout elsewhere in the
system.
Multiple MVME2300 boards may be installed in a single VME chassis.
Each must have a unique Universe address, selected by setting jumpers on
its J17 header, as described in
general, hardware multiprocessor features are supported.
Other MPUs on the VMEbus can interrupt, disable, communicate with,
and determine the operational status of the processor(s). One register of the
Universe set includes four bits that function as location monitors to allow
one MVME2300 processor to broadcast a signal to any other MVME2300
processors. All eight registers are accessible from any local processor as
well as from the VMEbus.
Preparing the MVME2300
Computer Group Literature Center Web Site
Hardware. In