Overview - Xilinx Vivado MIPI CSI-2 Product Manual

Overview

The MIPI CSI-2 RX subsystem allows you to quickly create systems based on the MIPI
protocol. It interfaces between MIPI-based image sensors and an image sensor pipe. An
internal high speed physical layer design, D-PHY, is provided that allows direct connection
to image sources. The top level customization parameters select the required hardware
blocks needed to build the subsystem.
X-Ref Target - Figure 1-1
dphy_clk_200M
lite_aclk
lite_aresetn
video_aclk
video_aresetn
Serial Interface
The subsystem consists of the following sub-cores:
• MIPI D-PHY
• MIPI CSI-2 RX Controller
• AXI CrossbarVideo Format Bridge
• AXI IIC
MIPI CSI-2 RX Subsystem v4.0
PG232 July 02, 2019
Figure 1-1
AXI4-Lite Interface
AXI Crossbar
PPI
MIPI CSI-2 RX
MIPI D-PHY
Controller
Figure 1-1: Subsystem Architecture
www.xilinx.com
shows the subsystem architecture.
AXI IIC
Video
Format
Bridge
Embedded Non-Image
Interface (AXI4-Stream)
csirxss_csi_irq
Send Feedback
Chapter 1
IIC Interface
csirxss_iic_irq
Video Interface
(AXI4-Stream)
5