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High-voltage Serial Programming Characteristics
Low-voltage Serial
Downloading
AT90S/LS2323/2343
42
Figure 34. High-voltage Serial Programming Timing
SDI (PB0), SII (PB1)
SCI (XTAL1/PB3)
SDO (PB2)
Table 17. High-voltage Serial Programming Characteristics, T
5.0V ± 10% (unless otherwise noted)
Symbol
Parameter
t
SCI (XTAL1/PB3) Pulse Width High
SHSL
t
SCI (XTAL1/PB3) Pulse Width Low
SLSH
SDI (PB0), SII (PB1) Valid to SCI (XTAL1/PB3)
t
IVSH
High
SDI (PB0), SII (PB1) Hold after SCI (XTAL1/PB3)
t
SHIX
High
t
SCI (XTAL1/PB3) High to SDO (PB2) Valid
SHOV
t
Wait after Instr.3 for Chip Erase
WLWH_CE
t
Wait after Instr.3 for Write Fuse Bits
WLWH_PFB
Both the program and data memory arrays can be programmed using the serial SPI bus
while RESET is pulled to GND. The serial interface consists of pins SCK, MOSI (input)
and MISO (output) (see Figure 35). After RESET is set low, the Programming Enable
instruction needs to be executed first before program/erase instructions can be
executed.
Figure 35. Low-voltage Serial Programming and Verify
GND
t
t
IVSH
SHIX
t
SHSL
t
SHOV
AT90S/LS2323,
2.7 - 6.0V
AT90S/LS2343
RESET
VCC
PB2
PB1
GND
PB0
t
SLSH
= 25 ° C ± 10%, V
A
CC
Min
Typ
Max
Units
100.0
ns
100.0
ns
50.0
ns
50.0
ns
10.0
16.0
32.0
ns
5.0
10.0
15.0
ms
1.0
1.5
1.8
ms
SCK
MISO
MOSI
1004D–09/01
=
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