36.13 Write Protection Registers
11100B–ATARM–31-Jul-12
To prevent any single software error that may corrupt HSMCI behavior, the entire HSMCI
address space from address offset 0x000 to 0x00FC can be write-protected by setting the
WPEN bit in the
"HSMCI Write Protect Mode Register"
If a write access to anywhere in the HSMCI address space from address offset 0x000 to 0x00FC
is detected, then the WPVS flag in the HSMCI Write Protect Status Register (HSMCI_WPSR) is
set and the field WPVSRC indicates in which register the write access has been attempted.
The WPVS flag is reset by writing the HSMCI Write Protect Mode Register (HSMCI_WPMR)
with the appropriate access key, WPKEY.
The protected registers are:
•
"HSMCI Mode Register"
•
"HSMCI Data Timeout Register"
•
"HSMCI SDCard/SDIO Register"
•
"HSMCI Completion Signal Timeout Register"
•
"HSMCI Configuration Register"
SAM4S Series [Preliminary]
(HSMCI_WPMR).
877
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