Power Supply; Power Supply Overview; Figure 1. Power Supply - ST STM8S Application Note

AN2752
2

Power supply

2.1

Power supply overview

The device can be supplied through a 3.0 V to 5.5 V external source. An on-chip power
management system provides the 1.8 V digital supply to the core logic, both in normal and
low power modes. It is also capable of detecting voltage drops, on both main external (3.3
V/5 V) and internal (1.8 V) supplies.
The device provides:
●
One pair of pads V
ballast transistor supply.
●
Two pairs of pads dedicated for V
used to power only the I/O's. On 32-pin packages, only one pair is bonded.
Note: For V
DDIO
and to use only one decoupling capacitance. The purpose is to ensure good noise immunity
by reducing the connection length between both supplies and also between V
the capacitor.
●
One pair of pads V
functions. Refer to
details.
Figure 1.
Note: The capacitors must be connected as close as possible to the device supplies (especially
V in case of dedicated ground plane).
DD
Placing a crystal/resonator on OSCIN/OSCOUT is optional. The resonator must be
connected as close as possible to the OSCIN and OSCOUT pins. The loading capacitance
ground must be connected as close as possible to V
/V (3.3 V ± 0.3 V to 5 V ± 0.5 V) dedicated to the main regulator
DD SS
/V next to V /V
SSIO DD SS
/V
DDA SSA
Section 3: Analog-to-digital converter (ADC) on page 10
Power supply
Analog
signal
Star connected
Doc ID 14651 Rev 3
/V (3.3 V ± 0.3 V to 5 V ± 0.5 V), which are
DD_IO SS_IO
, it is recommended to connect these two pairs together
(3.3 V ± 0.3 V to 5 V ± 0.5 V) dedicated to analog
V
DDA
Analog functions
V
SSA
V
CAP
V /V
DD DDIO1
Main / Low power
V /V
SS SSIO1
V
DDIO2
V
V
SSIO2
DDIO
OSCIN
V
DDIO
OSCOUT
SS
CPU
RAM
regulator
Logic
IOs IOs
V
SSIO
V
SSIO
XTAL
ai15330
.
Power supply
/V and
DD DDIO
for more
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