Rtcc_Cmd - Command Register - Silicon Laboratories EFR32xG21 Wireless Gecko Reference Manual

Bit Name
1
2 CNTCCV1TOP
When set, the counter wraps around on a CC1 event
1 PRECNTCCV0TOP
When set, the pre-counter wraps around when PRECNT equals RTCC_CC0_OCVALUE[14:0].
0 DEBUGRUN
Set this bit to keep the RTCC running during a debug halt.
Value
0
1

15.5.4 RTCC_CMD - Command Register

Offset
0x00C
Reset
Access
Name
Bit Name
31:2 Reserved
1 STOP
Write a 1 to stop the RTCC
0 START
Write a 1 to start the RTCC
silabs.com | Building a more connected world.
Reset Access Description
CCV0MATCH CNT register ticks when PRECNT matches
RTCC_CC0_CCV[14:0]
0x0 RW CCV1 top value enable
0x0 RW Pre-counter CCV0 top value enable.
0x0 RW Debug Mode Run Enable
Mode Description
X0 RTCC is frozen in debug mode
X1 RTCC is running in debug mode
Bit Position
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
ventions
0x0 W Stop RTCC main counter
0x0 W Start RTCC main counter
Reference Manual
RTCC - Real Time Clock with Capture
Rev. 0.4 | 373
1.2 Con-