Energy Modes; Clock Output On A Pin - Silicon Laboratories EFR32xG21 Wireless Gecko Reference Manual

8.3.4 Energy Modes

The availability of oscillators and system clocks depends on the chosen energy mode. By default, the high frequency oscillators
(HFRCODPLL, HFRCOEM23, and HFXO) and high frequency clocks (SYSCLK, HCLK, PCLK, RADIOCLK, and EM01GRPACLK) are
available down to EM1 Sleep. From EM2 DeepSleep onwards these oscillators and clocks are normally off, although special cases ex-
ist as summarized in Table 8.1 Oscillator and clock availability in Energy Modes on page
8.1 CMU Overview on page 137
The low frequency oscillators (LFRCO and LFXO) are available in all energy modes except in EM3 Stop when they are off by definition.
By default, these oscillators are also off in EM4 Shutoff, but they can be requested on in these states as well if needed. The ultra low
frequency oscillator (ULFRCO) is on in all energy modes, except for EM4 Shutoff, but it can be requested on in that state as well if
needed. The low frequency clocks (EM23GRPACLK, EM4GRPACLK, WDOGCLK, RTCCCLK, and PRORTCCLK) are in various power
domains and therefore their availability not only depends on the chosen clock source, but also on the chosen energy mode as indicated
in Table 8.1 Oscillator and clock availability in Energy Modes on page
HFRCODPLL
HFXO
HFRCOEM23
LFRCO, LFXO
ULFRCO
SYSCLK, HCLK, PCLK, RADIOCLK, EM01GRPACLK
IADCCLK
EM23GRPACLK, WDOGCLK, RTCCCLK,
PRORTCCLK
EM4GRPACLK
1 Under software control.
2 Default off, but kept active if used by the IADC.
3 Default off, but kept active if used by BURTC.
4 On only if ULFRCO is used as clock source.

8.3.5 Clock Output on a Pin

It is possible to configure the CMU to output clocks on the CMU_CLK pins. This clock selection is done using the CLKOUTSEL bitfields
in CMU_EXPORTCLKCTRL. The required output pins must be enabled in the GPIO_DBUSCMU_ROUTEEN register and the pin loca-
tions can be configured in the GPIO_DBUSCMU_CLKOUT ROUTE register. The following clocks can be output on a pin:
• HCLK and EXPCLK. The HCLK is the high frequency clock for AHB. The EXPCLK is a prescaled version of HCLK as controlled by
the PRESC bitfield in the CMU_EXPORTCLKCTRL register.
• The qualified clock from any of the oscillators (ULFRCO, LFRCO, LFXO, HFXO, HFRCODPLL, HFRCOEM23). A qualified clock will
not have any glitches or skewed duty-cycle during startup. For the LFXO and HFXO, correct configuration of the TIMEOUT bitfield(s)
in LFXO_CFG and HFXO_XTALCFG, respectively is required to guarantee a properly qualified clock.
HCLK will not have a 50-50 duty cycle when any other division factor than 1 is used for HCLKPRESC bitfield in CMU_SYSCLKCTRL
(i.e. if HCLKPRESC is not equal to 0). In such a case, the exported EXPCLK will also not be 50-50 when its division factor is not set to
an even number in the PRESC bitfield of the CMU_EXPORTCLKCTRL register.
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also indicates which oscillators and clocks can be used in what energy modes.
Table 8.1. Oscillator and clock availability in Energy Modes
EM0 Active /
EM1 Sleep
On
On
On
On
On
On
On
On
On
145.
EM2 DeepSleep
1 Off
1 Off
1 2
On
1 1
On
On
1 Off
1 2
On
1 1
On
1 1
On
Reference Manual
CMU - Clock Management Unit
145. The CMU overview figure in
EM3 Stop EM4 Shutoff
Off Off
Off Off
2 Off
On
Off 3
On
On 3
On
Off Off
2 Off
On
4 Off
On
4 3
On On
Rev. 0.4 | 145
Figure