Analog Source Resistance Calculation; Figure 25. Worst Case Error: V; Ain Ref; Ain = Vref - ST STM32 Application Note

How to get the best ADC accuracy
3.2.6

Analog source resistance calculation

Let us assume that the maximum error allowed is equal to 1/2 LSB. We will calculate the
maximum source resistance allowed.
V is the voltage across the internal C
c
Then we have:
Let t be the sampling time.
s
t = T /f
s S ADC
For a given t
corresponding to V
0 V to V
AIN
V = V
AIN REF+
maximum source resistance.
Error
where:
R
max
N is the ADC resolution (in our case N = 12)
This gives: e
28/49
Error V
=
AIN

Figure 25. Worst case error: V

, where T is the sampling time evaluated by cycles
s
, the error corresponding to V
s
< V because the C
AIN REF+
when V = V than it takes when V
AIN REF+
is the worst case to be taken into account in the demonstration of the
⎛
⎜
⎜
V V 1 e
= –
⎜
REF+ REF+
⎜
⎝
= (R + R )max(2)
AIN ADC
t s
------------------------------- -
–
R C
max ADC
=
DocID15067 Rev 3
capacitor (refer to
ADC
1
V c -- - LSB
– =
2
= V
AIN REF+
capacitor takes more time to charge from
ADC
AIN
t s
⎞
– ------------------------------- -
⎟
R C
max ADC
⎟
– =
⎟
⎟
⎠
1
R
. Thus:
---------- -
max
N 1
+
2
Figure 15).
= V
AIN REF+
is greater than the error
< V (refer to Figure
REF+
V
1
REF+
⋅
-- - ------------------ -
2 N
2
t s
=
-------------------------------------------- -
N
+
⋅ (
C ln 2
ADC
AN2834
(1)
25). So
(3)
1
)