Differential Linearity Error; Figure 10. Negative Gain Error Representation - ST STM32 Application Note

AN2834
1. The gain error, E
2.1.3

Differential linearity error

The differential linearity error (DLE) is the maximum deviation between the actual and ideal
steps. Here 'ideal' does not refer to the ideal transfer curve but to the ADC resolution. The
DLE is denoted by E
E = Actual step width – 1 LSB
D
Ideally, an analog input voltage change of 1 LSB should cause a change in the digital code.
If an analog input voltage greater than 1 LSB is required for a change in digital code, a
differential linearity error is observed. The DLE therefore corresponds to the maximum
additional voltage that is required to change from one digital code to the next.
The DLE is also known as the differential non-linearity (DNL) error.
Example
A given digital output should correspond to an analog input range. Ideally, the step width
should be 1 LSB. Let us assume that the digital output is the same over an analog input
voltage range of 1.9998 V to 2.0014 V, the step width will be:
2.0014 V – 1.9998 V = 1.6 mV.
E is thus the voltage difference between the higher (2.0014 V) and the lower (1.9998 V)
D
analog voltages minus the voltage corresponding to 1 LSB.

Figure 10. Negative gain error representation

, is shown in magenta.
G
. It is represented in
D
DocID15067 Rev 3
Figure 11.
ADC errors
13/49
48