Sdram Clock - Denon DN-X1600 Service Manual

Hide thumbs Also See for DN-X1600:
Table of Contents

Advertisement

Pin No
BGA Location
238
R14
239
R15
240
R16
241
T1
242
T2
243
T3
244
T4
245
T5
246
T6
247
T7
248
T8
249
T9
250
T10
251
T11
252
T12
253
T13
254
T14
255
T15
256
T16
Pin name
I/O
EM_CLK
O
ASDQM3
O
DVDH
DVDH
DGND
DGND
DVDH
DVDH
ASDWE
O
AEMD7
IO
AEMD5
IO
AEMD3
IO
DGND
DGND
AEMD0
IO
AEMD14
IO
DGND
DGND
AEMD11
IO
AEMD9
IO
ASDQM1
O
ASDCKE
O
DVDH
DVDH
DGND
DGND
Pol

SDRAM Clock

N
Write Enable or Byte Enable for EM_D[31:24]
N
SDRAM Write Enable
EMIF Data Bus [Lower 16 Bits]
EMIF Data Bus [Lower 16 Bits]
EMIF Data Bus [Lower 16 Bits]
EMIF Data Bus [Lower 16 Bits]
EMIF Data Bus [Lower 16 Bits]
EMIF Data Bus [Lower 16 Bits]
EMIF Data Bus [Lower 16 Bits]
N
Write Enable or Byte Enable for EM_D[15:8]
SDRAM Clock Enable
73
Function

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents