Denon DN-X1600 Service Manual page 76

Pin No BGA Location
33 C1
34 C2
35 C3
36 C4
37 C5
38 C6
39 C7
40 C8
41 C9
42 C10
43 C11
44 C12
45 C13
46 C14
47 C15
48 C16
49 D1
50 D2
51 D3
52 D4
53 D5
54 D6
55 D7
56 D8
57 D9
58 D10
59 D11
60 D12
61 D13
62 D14
63 D15
64 D16
65 E1
66 E2
67 E3
68 E4
69 E5
70 E6
71 E7
72 E8
73 E9
74 E10
75 E11
76 E12
77 E13
78 E14
79 E15
80 E16
81 F1
82 F2
83 F3
84 F4
85 F5
Pin name I/O
710_MCLK O
NC NC
DGND DGND
NC NC
RELAY1 O
RELAY2 O
RELAY3 O
4382_CSN O
1796_CSN O
DIT_CDTI O
DSPINT1 O
BLINK. O
SC2. O
DGND DGND
USBD_2 O
USBD_1 O
SH_RDY O
V3FPG VCCO
SHA6 I
SHA2 I
PUDC_B PU
CS7 I
RELAY4 O
DAC_CDTI O
DAC_CCLK O
A_RST O
DSPINT2 O
NC NC
SC3. O
ASDQM1. I
USBD_3 O
USBD_4 O
SHA10 I
SHA7 I
SHA5 I
UNLCK_1 I
DGND DGND
DQMLL I
DSPGPIO1 IO
V3FPG VCCO
NC NC
DSPGPIO2 IO
V3FPG VCCAUX
DGND DGND
ASDQM3. I
ASDQM2. I
V3FPG VCCO
ASDQM0. I
SHA9 I
DGND DGND
SHA4 I
UNLCK_2 I
V3FPG VCCAUX
Pol
System clock for DSP
CD/PHONO select signal
CD/PHONO select signal
CD/PHONO select signal
N DAC chip select (AK4382)
N DAC chip select (PCM1796)
DIT control data (AK4104)
Interrupt signal for DSP
Panel BLINK signal
Panel scan signal
USB Audio data (DSP)
USB Audio data (DSP)
N Interrupt signal for CPU
10bits address bus (CPU)
10bits address bus (CPU)
Configuration reserve pin
N Chip select (CPU)
CD/PHONO select signal
DAC control data (AK4382, PCM1796)
DAC control clock (AK4382, PCM1796)
N Reset for ADC and DAC
N Interrupt signal for DSP
Panel scan signal
N DQM signal from DSP
USB Audio data (DSP)
USB Audio data (DSP)
10bits address bus (CPU)
10bits address bus (CPU)
10bits address bus (CPU)
DIR PLL unlock signal (DIR9001)
N DQM signal from CPU
General Purpose Input/Output signal for DSP
General Purpose Input/Output signal for DSP
N DQM signal from DSP
N DQM signal from DSP
N DQM signal from DSP
10bits address bus (CPU)
10bits address bus (CPU)
DIR PLL unlock signal (DIR9001)
76
Function