Fsp Io / Jvl Profile - JVL MAC00-EC41 User Manual

Industrial ethernet mis and milxxx (g2) motors
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8.5
The JVL Profile based on the FSP IO profile is supported by all JVL motors with Sercos
But for the MAC400 – MAC4500 motors and the MIS/MILxxxES motors it is not factory
default. Please refer to
profile.
8.5.1
Setting up the cyclic data (FSP IO / JVL Profile)
When using the FSP IO / JVL Profile the cyclic data (the data which is transferred cyclically
between master and slave) are setup in the MacTalk program in the Sercos tab. In the
below figure is shown an example of a cyclic setup where both motor controller registers
and Sercos
Cyclic data is used when data is needed fast and frequent. That is fast dynamic changing
data such as position, velocity, torque etc.
It is mandatory to have the error/status register (register 35) as one of the slave to master
registers. If not placed by the user then the Sercos module will overrule the configuration
and place register 35 anyway.
When module registers (register numbers above 65535) are chosen, they have to be
placed after the motor registers (register numbers below 65535) in the list of cyclic reg-
isters. If module registers is placed in cyclic R/W, then the register number can be calcu-
lated as follows:
Register number = 65536 x sub index.
Example: module command (sub-index 15) = 65536 x 15 = register 983040
The JVL profile cyclic data consists of up to 8 I/O words that are freely configurable. This
means that 8 input registers can be selected and another 8 registers for output purposes.
NB! If an index is set to zero (No selection), then the following indexes is discarded.
Thereby computing resources in the drive are released, which makes much faster cycle
times possibly. Please see next paragraph for possible cycle times.
On the Sercos tab in MacTalk these I/O's are configured, as in the example below.
TT3143-01GB
216
JVL Industri Elektronik A/S - User Manual - Ethernet for MAC and MIS motors

FSP IO / JVL profile

Enabling FSP Drive / Pack Profile., page 191
®
module registers are accessed.
®
.
for enabling the JVL

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