Trigger - Matrox Radient eCL Series Installation And Hardware Reference

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PSG 0
TTL_AUX_IO_4
(M_AUX_IO8)
OPTO_AUX_IN0
(M_AUX_IO_6)
LVDS_AUX_IN2
(M_AUX_IO10)
TTL_AUX_IO_6
(M_AUX_IO2)
OPTO_AUX_IN8
(M_AUX_IO0)
LVDS_AUX_IN10
(M_AUX_IO4)
TTL_AUX_IO_5
(M_AUX_IO9)
OPTO_AUX_IN1
(M_AUX_IO7)
LVDS_AUX_IN3
(M_AUX_IO11)
TTL_AUX_IO_14
(M_AUX_IO3)
OPTO_AUX_IN9
(M_AUX_IO1)
LVDS_AUX_IN11
(M_AUX_IO5)

Trigger

Each PSG has 4 trigger controllers. Each trigger controller can trigger the image
acquisition, the timers, and/or the synchronization signals of the PSG's acquisition
path. Only one auxiliary signal per trigger controller can be programmed as a
trigger input signal.
The auxiliary signals are restricted to specific trigger controllers. The signals are
routed to the following trigger controllers:
PSG 1
TTL_AUX_IO_12
(M_AUX_IO8)
TTL_AUX_IO_6
(M_AUX_IO2)
OPTO_AUX_IN8
(M_AUX_IO0)
LVDS_AUX_IN10
(M_AUX_IO4)
TTL_AUX_IO_13
(M
_AUX_IO
9)
TTL_AUX_IO_14
(M
_AUX_IO
3)
OPTO_AUX_IN9
(M
_AUX_IO
1)
LVDS_AUX_IN11
(M
_AUX_IO
5)
The trigger input signal must meet the electrical specification of the auxiliary
signal.
The trigger signal's pulse width must be greater than two pixels. The same pulse
width restriction applies if using the trigger to start a synchronization signal. If
using the trigger to start a timer, the trigger signal's pulse width must be greater
than two clock periods of the timer. To determine the timer's clock period, take
the inverse of the timer's clock frequency. For example, if the pixel frequency is
12.27 MHz, the minimum pulse width is 2 x 1/12.27 MHz (approximately 163
nsec).
Matrox Radient eCL acquisition section
PSG 2
TTL_AUX_IO_20
(M
_AUX_IO
8)
OPTO_AUX_IN16
(M
_AUX_IO
6)
LVDS_AUX_IN18
(M
_AUX_IO
10)
TTL_AUX_IO_22
(M
_AUX_IO
2)
OPTO_AUX_IN24
(M
_AUX_IO
0)
LVDS_AUX_IN26
(M
_AUX_IO
4)
TTL_AUX_IO_21
(M
_AUX_IO
9)
OPTO_AUX_IN17
(M
_AUX_IO
7)
LVDS_AUX_IN19
(M
_AUX_IO
11)
TTL_AUX_IO_30
(M
_AUX_IO
3)
OPTO_AUX_IN25
(M
_AUX_IO
1)
LVDS_AUX_IN27
(M
_AUX_IO
5)
PSG 3
TTL_AUX_IO_28
(M
_AUX_IO
8)
TTL_AUX_IO_22
(M
_AUX_IO
2)
OPTO_AUX_IN24
(M
_AUX_IO
0)
LVDS_AUX_IN26
(M
_AUX_IO
4)
TTL_AUX_IO_29
(M
_AUX_IO
9)
TTL_AUX_IO_30
(M
_AUX_IO
3)
OPTO_AUX_IN25
(M
_AUX_IO
1)
LVDS_AUX_IN27
(M
_AUX_IO
5)
51

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