Acquisition Controller - Matrox Radient eCL Series Installation And Hardware Reference

54 Chapter 4: Matrox Radient eCL hardware reference
Supported tap configuration
T0T1 T2T3 T4 T5 T6 T7
T0T1 T2T3 T4 T5 T6 T7
Tn: a pixel from tap n, where n indicates the tap.

Acquisition controller

The acquisition controller is responsible for reconstructing and storing image data
in main on-board memory. When writing data to memory, the acquisition
controller can perform line and frame reversal; it can flip the image horizontally
and/or vertically.
On Matrox Radient eCL-DB/QB, the acquisition controller can write to four
non-sequential memory regions (zones) per acquisition path.
On Matrox Radient eCL-SF/DF, the acquisition controller can typically write to
eight non-sequential memory regions in single-Medium or single-Full mode, per
acquisition path. However, when grabbing 10 taps, the memory controller can
only write to one memory region. This means that each of the 10 taps must carry
one of 10 sequential pixels
T8 T9 T0T1 T2T3 T4 T5 T6
T8 T9 T0T1 T2T3 T4 T5 T6
Note that the width of each region must be a multiple of the number of taps in
that region.
To establish the number of non-sequential memory regions to which your video
source must write, refer to the documentation accompanying your video source.
T7 T8 T9 T0T0T0T0
T7 T8 T9
T4T4T4T4
T8T8T8T8
Tap configuration not supported
T2T2T2T2
T1T1 T1T1
T6T6T6T6
T5T5 T5T5
T9T9T9T9
T3T3 T3T3
T7T7 T7T7