About This Guide
This document describes the basic setup, features, and operation of the SP623
Spartan-6® FPGA GTP transceiver characterization board. The SP623 board provides the
hardware environment for characterizing and evaluating the GTP transceivers available
on the Spartan-6 XC6SLX150T-3FGG676 FPGA.
Guide Contents
This user guide contains the following chapters and appendices:
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To find additional documentation, see the Xilinx website at:
To search the Answer Database of silicon, software, and IP questions and answers, or to
create a technical support WebCase, see the Xilinx website at:
Conventions
This document uses the following conventions. An example illustrates each convention.
Typographical
The following typographical conventions are used in this document:
SP623 Board User Guide
UG751 (v1.0) May 22, 2010
Chapter 1, SP623 Board Features and Operation
and operation of the SP623 Spartan-6 FPGA GTP transceiver characterization board.
Appendix A, Default Jumper Positions
board for proper operation.
Appendix B, VITA 57.1 FMC HPC Connector Pinout
the FPGA mezzanine card (FMC) connector.
Appendix C, SP623 Master UCF Listing
constraints file (UCF).
Appendix D, References
provides a list of references and links to related
documentation.
http://www.xilinx.com/support/documentation/index.htm.
http://www.xilinx.com/support.
www.xilinx.com
describes the components, features,
lists the jumpers that must be installed on the
provides a pinout reference for
provides a listing of the SP623 master user
Preface
5
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