Altera DE2-70 User Manual page 67

SRAM_DPA2 PIN_AK20
SRAM_DPA3 PIN_AJ9
SRAM_GW_N PIN_AG18
SRAM_OE_N PIN_AD18
SRAM_WE_N PIN_AF18
Table 5.20. SSRAM pin assignments.
Signal Name FPGA Pin No.
FLASH_A[0] PIN_AF24
FLASH_A[1] PIN_AG24
FLASH_A[2] PIN_AE23
FLASH_A[3] PIN_AG23
FLASH_A[4] PIN_AF23
FLASH_A[5] PIN_AG22
FLASH_A[6] PIN_AH22
FLASH_A[7] PIN_AF22
FLASH_A[8] PIN_AH27
FLASH_A[9] PIN_AJ27
FLASH_A[10] PIN_AH26
FLASH_A[11] PIN_AJ26
FLASH_A[12] PIN_AK26
FLASH_A[13] PIN_AJ25
FLASH_A[14] PIN_AK25
FLASH_A[15] PIN_AH24
FLASH_A[16] PIN_AG25
FLASH_A[17] PIN_AF21
FLASH_A[18] PIN_AD21
FLASH_A[19] PIN_AK28
FLASH_A[20] PIN_AJ28
FLASH_A[21] PIN_AE20
FLASH_DQ[0] PIN_AF29
FLASH_DQ[1] PIN_AE28
FLASH_DQ[2] PIN_AE30
FLASH_DQ[3] PIN_AD30
FLASH_DQ[4] PIN_AC29
SRAM Parity Data[2]
SRAM Parity Data[3]
SRAM Global Write Enable
SRAM Output Enable
SRAM Write Enable
Description
FLASH Address[0]
FLASH Address[1]
FLASH Address[2]
FLASH Address[3]
FLASH Address[4]
FLASH Address[5]
FLASH Address[6]
FLASH Address[7]
FLASH Address[8]
FLASH Address[9]
FLASH Address[10]
FLASH Address[11]
FLASH Address[12]
FLASH Address[13]
FLASH Address[14]
FLASH Address[15]
FLASH Address[16]
FLASH Address[17]
FLASH Address[18]
FLASH Address[19]
FLASH Address[20]
FLASH Address[21]
FLASH Data[0]
FLASH Data[1]
FLASH Data[2]
FLASH Data[3]
FLASH Data[4]
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DE2-70 User Manual