Altera DE2-70 User Manual page 64

DRAM0_CKE PIN_AA8
DRAM0_CLK PIN_AD6
DRAM0_WE_N PIN_W9
DRAM0_CS_N PIN_Y10
DRAM1_A[0] PIN_T5
DRAM1_A[1] PIN_T6
DRAM1_A[2] PIN_U4
DRAM1_A[3] PIN_U6
DRAM1_A[4] PIN_U7
DRAM1_A[5] PIN_V7
DRAM1_A[6] PIN_V8
DRAM1_A[7] PIN_W4
DRAM1_A[8] PIN_W7
DRAM1_A[9] PIN_W8
DRAM1_A[10] PIN_T4
DRAM1_A[11] PIN_Y4
DRAM1_A[12] PIN_Y7
DRAM_D[16] PIN_U1
DRAM_D[17] PIN_U2
DRAM_D[18] PIN_U3
DRAM_D[19] PIN_V2
DRAM_D[20] PIN_V3
DRAM_D[21] PIN_W1
DRAM_D[22] PIN_W2
DRAM_D[23] PIN_W3
DRAM_D[24] PIN_Y1
DRAM_D[25] PIN_Y2
DRAM_D[26] PIN_Y3
DRAM_D[27] PIN_AA1
DRAM_D[28] PIN_AA2
DRAM_D[29] PIN_AA3
DRAM_D[30] PIN_AB1
DRAM_D[31] PIN_AB2
DRAM1_BA_0 PIN_T7
DRAM1_BA_1 PIN_T8
DRAM1_LDQM0 PIN_M10
DRAM1_UDQM1 PIN_U8
SDRAM 1 Clock Enable
SDRAM 1 Clock
SDRAM 1 Write Enable
SDRAM 1 Chip Select
SDRAM 2 Address[0]
SDRAM 2 Address[1]
SDRAM 2 Address[2]
SDRAM 2 Address[3]
SDRAM 2 Address[4]
SDRAM 2 Address[5]
SDRAM 2 Address[6]
SDRAM 2 Address[7]
SDRAM 2 Address[8]
SDRAM 2 Address[9]
SDRAM 2 Address[10]
SDRAM 2 Address[11]
SDRAM 2 Address[12]
SDRAM 2 Data[0]
SDRAM 2 Data[1]
SDRAM 2 Data[2]
SDRAM 2 Data[3]
SDRAM 2 Data[4]
SDRAM 2 Data[5]
SDRAM 2 Data[6]
SDRAM 2 Data[7]
SDRAM 2 Data[8]
SDRAM 2 Data[9]
SDRAM 2 Data[10]
SDRAM 2 Data[11]
SDRAM 2 Data[12]
SDRAM 2 Data[13]
SDRAM 2 Data[14]
SDRAM 2 Data[15]
SDRAM 2 Bank Address[0]
SDRAM 2 Bank Address[1]
SDRAM 2 Low-byte Data Mask
SDRAM 2 High-byte Data Mask
61
DE2-70 User Manual