Microsemi SmartFusion2 Manual page 11

Table 3-1 lists the Hard Multiplier Accumulator port signals for Normal mode.
Table 3-1 • Hard Multiplier Accumulator Ports - Normal Mode
Signal Direction
A0 Input
B0 Input
C Input
CLK Input
A0_ACLR_N Input
A0_SCLR_N Input
A0_EN Input
B0_ACLR_N Input
B0_SCLR_N Input
B0_EN Input
C_ACLR_N Input
C_SCLR_N Input
C_EN Input
CARRYIN Input
ARSHFT17_ACLR_N Input
ARSHFT17_SCLR_N Input
ARSHFT17_EN Input
SUB_ACLR_N Input
SUB_SCLR_N Input
SUB_EN Input
SUB Input
P_ACLR_N Input
P_SCLR_N Input
P_EN Input
P Output
OVERFLOW Output
Description
Input data A0, 2- 18 bits wide
Input data B0, 2- 18 bits wide
Input data C, 2- 44 bits wide
Input clock for all registers
Asynchronous reset for data A0 registers
Synchronous reset for data A0 registers
Enable for data A0 registers
Asynchronous reset for data B0 registers
Synchronous reset for data B0 registers
Enable for data B0 registers
Asynchronous reset for data C, Carry In registers
Synchronous reset for data C, Carry In registers
Enable for data C, Carry In registers
Carry In input for operand C
Asynchronous reset for ARSHF T17 register
Synchronous reset for ARSHF T17 register
Enable for ARSHFT17 register
Asynchronous reset for input control SUB registers
Synchronous reset for input control SUB registers
Enable for input control SUB registers
Input control signal to select between add or subtract operation
Asynchronous reset for result P, CDOUT, Overflow/Carryout registers
Synchronous reset for result P, CDOUT, Overflow/Carryout registers
Enable for result P, CDOUT, Overflow/Carryout registers
Pn = Pn-1 + CARRYIN + C + (A0 * B0) when SUB = 0
Pn = Pn-1 + CARRYIN + C - (A0 * B0) when SUB = 1
When high, indicates that the result exceeded the width of output P.
OVERFLOW = (P[45] ^ P[44]) | (P[44] ^ P[43])
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