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CV-M40
6.2. Input/Output of Timing Signals
Some signals can be input or output on different connector pins depending of camera mode and
jumper setting. Please refer to the principle diagram fig. 29. It shows input and output pins and
the jumper positions as it is for factory setting. The diagram can be useful for understanding the
following modes and jumper functions.
For details, please refer to chapter "7.2. Jumper settings"
6.2.1. Input of External HD/VD signals
The factory pre-set is HD/VD input on pin 6/12 and 7/12. The video output is synchronized with
external HD/VD signals if applied. If no ext. HD is connected, the camera will switch to the
internal X-tal controlled HD sync. If no ext. VD is connected, the camera will continue with its
internal VD. The external sync system should always follow the camera sync and scanning
system. The external HD/VD signal should be 4.0 Vp-p ±2.0 V from a 75 Ω source. The inputs are
factory set to TTL level (2.0 to 5.0 V). The input can be 75 Ω terminated by closing JP8/JP10 on
PK8273B board.
Input of external HD/VD for synchronizing the camera to an external source is possible in normal
continuous mode. Do not input external VD in trigger modes.
6.2.2. Output of Internal HD/VD signals
In order to output internal HD/VD signal 4.0 Vp-p from a 75 Ω source on pin 6/12 and 7/12, a
jumper setting is required. JP9/JP11on PK8273B board open, and JP12/JP13 short.
In normal continuous mode both the internal HD and VD can be output. In trigger modes the
internal VD will change to a WEN pulse. (Can be output on pin 7/12 by jumper setting).
6.2.3. Pixel Clock out on pin 9/12
Pin 9/12 is used for either pixel clock or WEN output. From factory none is output. Short jumper
JP7 (JP18 open) for pixel clock out. To avoid interference the pixel clock output should be
disabled if not used.
6.2.4. WEN out on pin 9/12
For applications where only the 12 pin connector is used, WEN can be output on pin 9/12 if JP18
is short (JP7 open). WEN active polarity is positive 1H. It can be changed to be active low by
JP22. The timing then depends of the actual mode.
6.2.5. Input of external trigger
The external trigger input use either the HD or the VD input circuit depending of the mode
setting. The external trigger signal should be 4.0 Vp-p ±2.0 V from a 75 Ω source. The trigger
inputs can be 75 Ω terminated by closing JP8/JP10 on PK8273B board.
Depending of which input circuit is uses for trigger input, the trigger mode will be H-reset or H
non-reset.
For a principle description of how it works, refer to fig. 29. with jumper in factory setting.
1) Trigger input on pin 6/12 will result in H reset mode.
2) Trigger input on pin 7/12 and external HD on pin 6/12 will result in H non-reset mode.
With trigger input on pin5/6:
1a) Trigger input on pin 5/6 will result in H reset mode. (JP5 short).
2a) Trigger input on pin 5/6 and external HD on pin 6/12 will result in H non-reset mode.
(JP5 open and JP20 short).
Please refer to chapter "7.2. Jumper settings" for details in mode settings.
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