Related Manuals for VersaLogic EPM-CPU-10
Summary of Contents for VersaLogic EPM-CPU-10
- Page 1 Reference Manual EPM-CPU-10 Pentium III/Celeron processor module with 10/100 Ethernet, Video, and PC/104-Plus interface.
- Page 3 EPM-CPU-10 Pentium III/Celeron processor module with 10/100 Ethernet, Video, and PC/104-Plus interface MEPM-CPU-10...
- Page 5 • BIOS information and upgrades • Utility routines and benchmark software Note: This is a private page for EPM-CPU-10 users only. It cannot be reached through our web site. You must enter this address directly to find the support page...
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Page 7: Reference Manual
All Rights Reserved Notice: Although every effort has been made to ensure this document is error-free, VersaLogic makes no representations or warranties with respect to this product and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose. -
Page 9: Table Of Contents
Initial Configuration and Setup................... 6 Recommended Components .................. 6 DRAM Module ...................... 6 Cables / Peripheral Devices ................... 6 CMOS Setup / Boot Procedure for EPM-CPU-10.............. 7 3. Reference........................9 Physical Dimensions......................9 Hardware Assembly..................... 10 Stack Arrangement ....................10 External Connectors...................... - Page 10 Table of Contents Disk on Chip ........................24 Enable / Disable ....................24 Compatible Devices..................... 24 Installing the DOC Chip ..................24 CMOS Setup ......................24 Serial Ports........................25 COM Port Configuration ..................25 COM2 RS-485 Mode Line Driver Control............25 Serial Port Connectors ..................
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Page 11: Introduction
Customizable setup defaults 2 COM + 1 LPT port The EPM-CPU-10 is a complete computer system in a compact two board set. It may be used alone or with expansion modules. It features a PC/104-Plus expansion interface for fast PCI- based interface to a wide variety of PC/104 and PC/104-Plus stacking modules. - Page 12 This exceptional processor card was designed from the ground up for OEM applications with longevity and reliability as the focus. It is fully supported by the VersaLogic design team. Both hardware and software (BIOS) customization are available. Please contact a VersaLogic Applications Support Specialist to discuss these requirements.
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Page 13: Technical Specifications
CPU External: 66/100 MHz PCI, PC/104-Plus: 33 MHz PC/104: 8 MHz Compatibility: PC/104 – Full compliance, except board width. Embedded-PCI (PC/104-Plus) – Full compliance, 3.3V or 5V modules Specifications are subject to change without notice. EPM-CPU-10 Reference Manual Introduction – 3... -
Page 14: Technical Support
Technical Support Technical Support If you have problems that this manual can’t help you solve, first visit the EPM-CPU-10 Product Support web page at http://www.versalogic.com/private/jaguarsupport.asp. If you have further questions, contact VersaLogic for technical support at (541) 485-8575. You can also reach our technical support engineers via e-mail at support@versalogic.com. -
Page 15: Configuration / Operation
ESD protective pouch. The lithium battery may explode if mistreated. Do not recharge, disassemble, or dispose of in fire. Dispose of used batteries promptly. EPM-CPU-10 Reference Manual Configuration / Operation – 5... -
Page 16: Initial Configuration And Setup
Initial Configuration and Setup The following list describes the recommended components and gives an abbreviated outline for setting up a typical development system. ECOMMENDED OMPONENTS • EPM-CPU-10 Board Set • 144-pin SODIMM SDRAM Memory Module (PC-66 or PC-100) • ATX Power Supply •... -
Page 17: Cmos Setup / Boot Procedure For Epm-Cpu-10
CMOS Setup / Boot Procedure for EPM-CPU-10 CMOS Setup / Boot Procedure for EPM-CPU-10 • Turn power on. • Press the DEL key the instant that video is displayed (during the memory test). • Verify correct CMOS Setup information as shown below. - Page 18 CMOS Setup / Boot Procedure for EPM-CPU-10 Creating a Bootable DOS DiskOnChip The DiskOnChip is shipped pre-formatted, non-bootable, without any files on it. The DiskOnChip will appear as Drive D in systems with an installed hard drive. If a hard drive is not installed, the DOC will appear as Drive C: 1.
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Page 19: Reference
Reference Physical Dimensions The EPM-CPU-10 is a two board set consisting of a CPU Module (North Bridge) and an I/O Module (South Bridge). Dimensions are given below to help with pre-production planning and layout. CPU Module (North Bridge) I/O Module (South Bridge) Overall Height (Fan &... -
Page 20: Hardware Assembly
ARDWARE SSEMBLY The EPM-CPU-10 consists of two boards which are mounted together with eight 5mm x 15mm M3 threaded hex male/female standoffs (p/n VL-HDW-101) using the corner mounting holes. These standoffs are secured to the top circuit board using four pan head screws. -
Page 21: External Connectors
External Connectors External Connectors ONNECTOR OCATION IAGRAMS Figure 3. Connector Location Diagram (CPU Module) Figure 4. Connector Location Diagram (I/O Module) EPM-CPU-10 Reference Manual Reference – 11... -
Page 22: Connector Functions And Interface Cables
* Note: This connector is a 2.00mm housing and crimp terminal, discrete wire style. Number of crimp terminals depends upon flat panel display model being used. Insulation displacement connector (IDC) for ribbon cable not recommended due to lack of clearance between connector JN3 and jumper header VN3. 12 – Reference EPM-CPU-10 Reference Manual... -
Page 23: High Density 80-Pin Cable (Js4)
MOUSE +5V (Protected) Receive Data Mouse Data Request to Send Ground Transmit Data Mouse Clock Clear to Send +5V (Protected) Data Terminal Ready Keyboard Data Ring Indicator Ground Ground Keyboard Clock — No Connect EPM-CPU-10 Reference Manual Reference – 13... -
Page 24: High Density 80-Pin Cable (Js3)
Drive Door Open Address bit 0 MISC Ground Address bit 2 +5V (Protected) Chip select 0 General Purpose Output Chip select 1 General Purpose Input Light Emitting Diode – Non Maskable Interrupt Ground No connection 14 – Reference EPM-CPU-10 Reference Manual... -
Page 25: Jumper Block Locations
Jumper Block Locations Jumper Block Locations Note! Jumpers shown in as-shipped configuration. Figure 5. Jumper Block Locations (CPU Module) Figure 6. Jumper Block Locations (I/O Module) EPM-CPU-10 Reference Manual Reference – 15... -
Page 26: Jumper Summary
1024x768 TFT Color 800x600 TFT Color 800x600 TFT Color 800x600 TFT Color 800x600 Dual Scan STN Color 800x600 Dual Scan STN Color 1024x768 TFT Color 1280x1024 Dual Scan STN Color 1024x600 Dual Scan STN Color 16 – Reference EPM-CPU-10 Reference Manual... -
Page 27: Jumper Summary
System BIOS Selector — — Primary System BIOS — Secondary System BIOS Note! The secondary System BIOS is field upgradable using the BIOS upgrade utility. See www.versalogic.com/private/jaguarsupport.asp for further information. VS2[3-4] Video BIOS Selector — — Primary Video BIOS — Secondary Video BIOS Note! The secondary System BIOS is field upgradable using the BIOS upgrade utility. -
Page 28: Power Supply
Ground Ground –12VDC Power Input +3.3VDC Power Input +5VDC Power Input Ground Digital Ground +5VDC Power Input Note! The +3.3VDC, +12VDC, and –12VDC inputs are only required for expansion modules that require these voltages. 18 – Reference EPM-CPU-10 Reference Manual... -
Page 29: Power Requirements
Normal battery voltage should be at least 3.0V. If the voltage drops below 3.0V, contact the factory for a replacement (part number T-HB3/5). Life expectancy under normal use is approximately 10 years. EPM-CPU-10 Reference Manual Reference – 19... -
Page 30: Cpu
A heat sink and cooling fan must be in place whenever power is applied to the CPU. The fan connects to header JN1 for power. Table 7: Fan Power Connector Signal Name Function Fan Power Ground Note! A fan is not required for the low-power C 350 MH model (b version). ELERON 20 – Reference EPM-CPU-10 Reference Manual... -
Page 31: Processor Power Management
OWER ANAGEMENT A form of power management called "throttling" is supported on the EPM-CPU-10. This is an Intel 440BX chipset feature that has been augmented with an I/O control bit in the VersaLogic Special Control Register. CMOS Setup options have been implemented to select throttling percentages from 12.5% to 75%, and to enable or disable throttling. -
Page 32: System Ram
• Storage Capacity 32 to 256 MB • Voltage 3.3 Volt • Error Detection Not supported • Error Correction Not supported • Type EPM-CPU -10d SDRAM PC-100 or faster EPM-CPU-10b,c,e SDRAM PC-66 or faster 22 – Reference EPM-CPU-10 Reference Manual... -
Page 33: Cmos Ram
Customization Department at VersaLogic. CMOS Setup Defaults The EPM-CPU-10 features the ability for users to modify the CMOS Setup defaults. This allows the system to boot up with user defined settings from cleared or corrupted CMOS RAM, battery failure, or battery-less operation. -
Page 34: Disk On Chip
The DOC needs to be formatted with the System files in order for it to be a bootable drive. Refer to the M-Systems web site (www.m-sys.com) for documentation on the DOC 2000 and details on making it a bootable device. 24 – Reference EPM-CPU-10 Reference Manual... -
Page 35: Serial Ports
; Fetch existing value al,01h ; Set bit D0 dx,al ; Turn DTR on (enables line driver) al,dx ; Fetch existing value al,0FEh ; Clear bit D0 dx,al ; Turn DTR off (disables line driver) EPM-CPU-10 Reference Manual Reference – 25... -
Page 36: Serial Port Connectors
ONNECTORS See the Connector Location Diagram on pages 11 and 12 for connector and cable information. The pinout of the DB9 connector applies to use of the VersaLogic transition cable #VL-CBL- 8001. This connector is protected with IEC 61000-4-2 (Level 4) rated TVS components to help protect against ESD damage. -
Page 37: Parallel Port
PC standard address of 378h. The port can be enabled/disabled and interrupt assignments can be made via the CMOS Setup screen. The pinout of the JA connector applies to use of the VersaLogic transition cable #VL-CBL-8001. This connector is protected with IEC 61000-4-2 (Level 4) rated TVS components to help protect against ESD damage. -
Page 38: Ide Hard Drive / Cd-Rom Interfaces
Address bit 1 No connection HOST ADDR0 Address bit 0 HOST ADDR2 Address bit 2 HCS0* HOST CS0* Reg. access chip select 0 HCS1* HOST CS1* Reg. access chip select 1 No connection Ground Ground Ground 28 – Reference EPM-CPU-10 Reference Manual... -
Page 39: Utility Connector
A standard PS/2 keyboard and mouse interface is accessible through connector JS4. In addition, you will find a programmable LED output, hard drive activity LED, and a speaker output as shown in the table below. The pinout of the PS/2 connectors applies to use of the VersaLogic transition cable #VL-CBL-8001. -
Page 40: External Speaker
Write Data Strobe Ground Ground WGAT* Write Enable Ground Ground TRK0* Track 0 Indicator Ground Ground WPRT* Write Protect Ground Ground RDAT* Read Data Ground Ground HDSL Head Select Ground Ground DCHG Drive Door Open 30 – Reference EPM-CPU-10 Reference Manual... -
Page 41: Video Interface
Video Interface Video Interface An on-board Asiliant Technologies 69030 controller 4MB video RAM on the EPM-CPU-10 provides full SVGA video output capabilities for the EPM-CPU-10 IDEO ESOLUTIONS This table displays the standard VESA SVGA modes and color depths. EPM-CPU-10 Table 13: Video Resolutions... -
Page 42: Flat Panel Display Connector
FP29 “ “ JN3[9] FP30 “ “ JN3[10] FP31 “ “ JN3[11] FP32 “ “ JN3[12] FP33 “ “ JN3[13] FP34 “ “ JN3[14] FP35 “ “ JN3[15] GND Ground JN3[16] +5V Power Supply 32 – Reference EPM-CPU-10 Reference Manual... -
Page 43: Compatible Flat Panel Displays
The flat panel connectors supply 5.0V, 3.3V, and 12V through the two FPD connectors. (Note: 3.3V and 12V must be supplied to JS1) Each of these power rails are protected by 1 AMP self- resetting fuses. EPM-CPU-10 Reference Manual Reference – 33... -
Page 44: Ethernet Interface
Ethernet Interface Ethernet Interface The EPM-CPU-10 features an industry-standard 10baseT / 100baseTX Ethernet interface based on the Intel 82559ER interface chip. While this interface is not NE2000 compatible, the 82559ER series is widely supported. Drivers are readily available to support a variety of operating systems such as QNX, VxWorks and other RTOS vendors. -
Page 45: Watchdog Timer
Watchdog Timer Watchdog Timer A watchdog timer circuit is included on the EPM-CPU-10 to reset the CPU or issue a NMI if proper software execution fails or a hardware malfunction occurs. NABLING THE ATCHDOG To enable or disable the watchdog to reset the CPU, set or clear bit D0 in I/O port 0E0h (or 1E0h). -
Page 46: Usb1.1 Interface
Connector JD is not numbered in the conventional manner as most dual-row headers. Care must be taken to attach the USB 1.1 adapter cables as shown below to prevent voltage reversal. Figure 8. USB 1.1 Connector Orientation Diagram 36 – Reference EPM-CPU-10 Reference Manual... -
Page 47: Expansion Bus
PC/104 I/O modules should be addressed in the 100h – 3FFh address range. Care must be taken to avoid the I/O addresses shown in the On-Board I/O Devices table on page 39. These ports are used by on-board peripherals and video devices. EPM-CPU-10 Reference Manual Reference – 37... -
Page 48: Memory And I/O Map
System BIOS, Flash Page (BIOS Ext.) D0000h DFFFFh PC/104, and DOC C0000h CFFFFh Video BIOS A0000h BFFFFh Video RAM 00000h 9FFFFh System DRAM Note! The memory region from E0000h-EFFFFh is controlled by the Map and Paging Control Register. 38 – Reference EPM-CPU-10 Reference Manual... -
Page 49: I/O Map
COM2 Serial Port 2F8h – 2FFh LPT1 Parallel Port 378h – 37Fh SVGA Video 3B0h – 3DFh Floppy Disk Controller 3F0h – 3F7h COM1 Serial Port 3F8h – 3FFh * User selectable via CMOS Setup. EPM-CPU-10 Reference Manual Reference – 39... -
Page 50: Interrupt Configuration
The temperature monitor interrupt and watchdog interrupt are enabled/disabled with the Special Control Register. Note If your design needs to use interrupt lines on the PC/104 bus, we recommend using IRQ5, IRQ9, and/or IRQ10. Figure 9. Interrupt Circuit Diagram 40 – Reference EPM-CPU-10 Reference Manual... -
Page 51: Special Control Register
WDOGNMI = 0 Disables WDOGNMI = 1 Enables WDOGRST Watch Dog Reset Enable — Enables and disables the watchdog timer reset circuit. WDOGRST = 0 Disables the watchdog timer. WDOGRST = 1 Enables the watchdog timer. EPM-CPU-10 Reference Manual Reference – 41... -
Page 52: Revision Indicator Register
Mnemonic Description D7-D3 PC4-PC0 Product Code — These bits are hard coded to represent the product type. The EPM-CPU-10 will always read as 00010. Other codes are reserved for future products. Product Code EPM-CPU-10 Note! This bits are read-only. Throttling Code — This bit specifies how throttling is enabled at power-up and reset. -
Page 53: Watchdog Timer Hold-Off Register
Throttling Enable — Enables and disables CPU throttling. Throttling = 0 Disable Throttling = 1 Enable Note! Models C & D are read write. Models B & E are set only and cleared by Reset. EPM-CPU-10 Reference Manual Reference – 43... -
Page 54: Map And Paging Control Register
Page Select — Selects which 64K block of FLASH will be mapped into the page frame at E0000h to EFFFFh Memory Range within FLASH 000000h to 00FFFFh 010000h to 01FFFFh 020000h to 02FFFFh 030000h to 03FFFFh 040000h to 04FFFFh 050000h to 05FFFFh 060000h to 06FFFFh 070000h to 07FFFFh 44 – Reference EPM-CPU-10 Reference Manual... -
Page 55: Appendix A - Other References
VersaLogic Corp., (www.versalogic.com) PC/104 Resource Guide CPU Chips Celeron Intel Corporation, (www.developer.intel.com) Pentium III General PC Documentation Microsoft Press, mspress.microsoft.com The Programmer’s PC Sourcebook General PC Documentation www.amazon.com The Undocumented PC EPM-CPU-10 Reference Manual Appendix A — Other References – 45...