Spdif-Out Connector (J25); Lvds Internal (J3); Table 22: Pin Assignment; Table 23: Lvds Pin Assignment - Kontron mITX-APL User Manual

Table 21: Pin Assignment
Pin Signal
1 GND
2 MIC1_L_Header
3 GND
4 MIC1_R_Header

6.16. SPDIF-OUT Connector (J25)

The digital audio interface (electrical SPDIF-Out) is available through the 2-pin connector J25 and can be used to
implement 6 (5.1) Channel High Definition Audio. Circuit is based on high fidelity 6-channel HD audio codec which is
compatible with Intel HD Audio specification and supports stereo 24-bit resolution and up to 192 kHz sample rate for
DACs/ADCs. The Signal-to-Noise Ratio (SNR) is up to 90 dB. 16/20/24-bit SPDIF TX Outputs are supporting 48 K/96
K/44.1 K/88.2 KHz sample rate.

Figure 23: SPDIF-OUT Connector

1 2

Table 22: Pin Assignment

Pin Signal
1 F_SPDIF_OUT
2
GND

6.17. LVDS internal (J3)

Figure 24: LVDS Connector

Table 23: LVDS Pin Assignment

Pin Description
1 +12 V
3 +12 V
5 +12 V
7 DTR
9 GND
11 DDC CLK
13 BKLTCTL
15
BKLTEN#
Type
PWR
AO
PWR
AO
Type
O-3.3
PWR
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Pin Description
2 +12 V
4 +12 V
6 GND
8 GND
10 5V
12 DDC DATA
14 VDD ENABLE
16
GND
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