Nor Flash - ST STM3210E-EVAL User Manual

UM0488
2.20

NOR Flash

128 Mbit NOR Flash is connected to bank1 NOR/PSRAM2 of the FSMC interface. The 16-
bit operation mode is selected by a pull-up resistor connected to the BYTE pin of the NOR
Flash. Write protection can be enabled or disabled by jumper JP5.
Table 14.
Jumper
JP5
Three different NOR 128-Mbit references can be present on the evaluation board depending
on component availability.
Table 15.
These three references are not identical in terms of ID code, speed, timing or block
protection. The demonstration firmware and the software library delivered with the board
support these three NOR Flash references. However, during the development of your
application software, you must verify which NOR reference is implemented on your board
(component referenced as U2 on silkscreen and schematic), and take its characteristics into
account.
NOR Flash related jumpers
Write protection is enabled when JP5 is fitted while write protection is
disabled when JP5 is not fitted.
Default setting: not fitted
NOR Flash reference
Reference
M29W128GL70ZA6E
M29W128GH70ZA6E
S29GL128P90FFIR20
Hardware layout and configuration
Description
Manufacturer
NUMONYX
NUMONYX
SPANSION
15/48