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Appendix B Specifications
Datacom specifications
Datacom specifications
Supported interface
standards
About pin assignments
RS-232/V.24 pin assignments
118
The following sections contain specifications related to the Datacom testing
option.
Table 45
lists the supported Datacom test interfaces and circuits.
Table 45
Datacom interface specifications
Interface Standard
RS-232/V.24
EIA-530
RS-449/V.36
V.35
X.21
Co-directional Timing
Contra-directional Timing
and Centralized Timing
a. With cable CB-44390 or CB-44346
b. With cable CB-44391 or CB-44345
All of the signals necessary for the supported interfaces are mapped to pins on
the universal Datacom connector. The following sections describe the pin
assignments for the supported interfaces.
Table 46
lists pin assignments for the RS-232/V.24 interface.
Table 46
RS-232/V.24 pin assignments
Pin
Signal Description
1
Signal Ground
2
Transmitted Data
3
Received Data
4
Request to Send
5
Clear to send
6
Data Set Ready
7
Signal Ground
SmartClass E1 Tester User's Guide
Supported Circuits
BA, BB, CA, CB, DD, CF, DB, DD, LL, RL, CD, DA,
and TM
EIA-422-B: BA, BB, CA, CB, CC, CD, CF, DA, DB,
and DD
EIA-423-B: LL, RL, and TM.
EIA-422-B: SD, RD, RS, CS, DM, TR, RR, RT, ST,
and TT
EIA-423-B: LL, RL, and TM.
Balanced clock and data circuits
EIA-232/V.24 control circuits
306: SCT, SCTE, SCR, SD, and RD
V.35: 103, 104, 114, and 115
V.28: 105, 106, 107, and 109
a
b
V.11: R, I, S, T, C
, and X
AMI with block violation for Octet timing
Data - AMI with 100% duty cycle
Clock - AMI with 50% duty cycle
Signal Source
N/A
DTE
DCE
DTE
DCE
DCE
N/A
CCITT Circuit
102
103
104
105
106
107
102
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