E1 Circuit Testing Specifications - JDS Uniphase SmartClass E1 User Manual

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E1 circuit testing specifications

Table 39 Receiver specifications (Continued)
Parameter
Bit Rate
Level Measurement
Slip Reference
External 2M Refer-
ence Clock
Table 40
describes the E1 circuit testing specifications.
Table 40 E1 circuit testing specifications
Parameter
General
Test Modes
Performance Measurement
Test Patterns
Anomaly (Error) Injection
SmartClass E1 Tester User's Guide
Specification
Range: 2.048 MHz ± 512 Hz
Accuracy: ±5 ppm, +1 ppm per year aging
Resolution: 1 Hz
Range: +3 to -37 dBnom
Accuracy (assumes All Ones pattern):
+3 to -15 dBnom, ± 1 dB
-15 to -30, ± 2 dB
-30 to -37, ± 3 dB
Resolution: 0.01 dBnom
Opposite Rx, External 2M Reference Clock
– 0.5 to 3 V square or sine wave
– 2.048 MHz
– Unbalanced/ 75 ohms (at adapter cable input)
Specification
Framed and unframed test signal generation
Bulk, n x 64 kbit/s BERT
G.821, G.826, M.2100 analysis
Error and alarm and generation and analysis
Round Trip Delay
Signal Level and Frequency
Audio Monitor
Si, Sa, A-bit, and E-Bit (REBE) monitoring and gen-
eration
Terminate, Monitor, Bridge, Line Loopback
G.821, G.826, M.2100
2^6-1 (ITU), 2^9-1 (ITU), 2^11-1 (ITU), 2^15-1 (ITU
& ITU INV), 2^20-1 (ITU & ITU INV), 2^23-1 (ITU &
ITU INV), QRSS, QBF
1:1, 1:3, 1:4, 1:7
User Bit Patterns 3 to 32 bits
User Byte Patterns 1 to 64 bytes
Live
Delay
Auto (via Auto Configure)
Bit (TSE): Single, rate, multiple
Code, CRC, Pattern Slip,
E-Bit (REBE): Single
FAS: Single, 2, 3, 4
MFAS: Single, 2
Appendix B Specifications

E1 circuit testing specifications

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