Ctsd16Ifg Register Description - Texas Instruments MSP430x5 series User Manual

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30.3.6 CTSD16IFG Register
CTSD16 Interrupt Flag Register
15 14
Reserved CTSD16OVIFG6
r0 rw-0
7 6
Reserved CTSD16IFG6
r0 rw-0
Bit Field
15 Reserved
14 CTSD16OVIFG6
13 CTSD16OVIFG5
12 CTSD16OVIFG4
11 CTSD16OVIFG3
10 CTSD16OVIFG2
9 CTSD16OVIFG1
8 CTSD16OVIFG0
7 Reserved
6 CTSD16IFG6
5 CTSD16IFG5
4 CTSD16IFG4
SLAU208Q – June 2008 – Revised March 2018
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Figure 30-19. CTSD16IFG Register
13 12
CTSD16OVIFG5 CTSD16OVIFG4
rw-0 rw-0
5 4
CTSD16IFG5 CTSD16IFG4
rw-0 rw-0
Table 30-10. CTSD16IFG Register Description
Type Reset Description
R 0h
Reserved. Always reads as 0.
RW 0h
CTSD16 converter 6 overflow interrupt flag
0b = No interrupt pending
1b = Interrupt pending
RW 0h
CTSD16 converter 5 overflow interrupt flag
0b = No interrupt pending
1b = Interrupt pending
RW 0h
CTSD16 converter 4 overflow interrupt flag
0b = No interrupt pending
1b = Interrupt pending
RW 0h
CTSD16 converter 3 overflow interrupt flag
0b = No interrupt pending
1b = Interrupt pending
RW 0h
CTSD16 converter 2 overflow interrupt flag
0b = No interrupt pending
1b = Interrupt pending
RW 0h
CTSD16 converter 1 overflow interrupt flag
0b = No interrupt pending
1b = Interrupt pending
RW 0h
CTSD16 converter 0 overflow interrupt flag
0b = No interrupt pending
1b = Interrupt pending
R 0h
Reserved. Always reads as 0.
RW 0h
CTSD16 converter 6 interrupt flag. CTSD16IFG6 is set when new conversion
results are available. CTSD16IFG6 is automatically reset when the
CTSD16MEM6 register is read, or may be cleared with software.
0b = No interrupt pending
1b = Interrupt pending
RW 0h
CTSD16 converter 5 interrupt flag. CTSD16IFG5 is set when new conversion
results are available. CTSD16IFG5 is automatically reset when the
CTSD16MEM5 register is read, or may be cleared with software.
0b = No interrupt pending
1b = Interrupt pending
RW 0h
CTSD16 converter 4 interrupt flag. CTSD16IFG4 is set when new conversion
results are available. CTSD16IFG4 is automatically reset when the
CTSD16MEM4 register is read, or may be cleared with software.
0b = No interrupt pending
1b = Interrupt pending
Copyright © 2008–2018, Texas Instruments Incorporated
11 10
CTSD16OVIFG3 CTSD16OVIFG2
rw-0 rw-0
3 2
CTSD16IFG3 CTSD16IFG2
rw-0 rw-0
CTSD16 Registers
9 8
CTSD16OVIFG1 CTSD16OVIFG0
rw-0 rw-0
1 0
CTSD16IFG1 CTSD16IFG0
rw-0 rw-0
817
CTSD16