Page 1
DLPU018 – October 2014 Read This First About This Manual This document specifies the command and control interface to the DLPC900 controller and defines all applicable commands, default settings, and control register bit definitions. Related Documents from Texas Instruments •...
SDA line, followed by a low-to-high transition on the SCL line. 1.1.3 DLPC900 Slave Address The DLPC900 offers a programmable slave address. Refer to the App Defaults Settings found in the DLP ® LightCrafter™ 6500 & 9000 GUI Firmware tab to set a different slave address. The default I...
Page 3
C format where the most significant byte is first. The DLPC900 internal command buffer has a maximum of 512 bytes and it is shared between the Read and Write commands; therefore, whenever a Read command is executed it must be followed by I operation with the Read Slave Address to retrieve the data otherwise the data will be overwritten by the next command executed.
2) Sequence Byte. The sequence byte can be a rolling counter. It is used primarily when the host wants a response from the DLPC900. The DLPC900 will respond with the same sequence byte that the host sent. The host can then match the sequence byte from the command it sent with the sequence byte from the DLPC900 response.
Page 6
Read command. Therefore, both Write and Read transactions are considered "writes" to the DLPC900 where the host performs an API level "Writefile" to the HID driver. The difference is when the DLPC900 executes a Read operation, where the DLPC900 places the response into its internal buffer and waits for the host to perform an API level "Readfile"...
Page 7
5. USB Command: Two byte USB command. 6. Once the host transmits the data over the USB interface, the DLPC900 will respond to the Read operation by placing the response data in its internal buffer. The host must then perform a HID driver read operation.
DLPC900 Control Commands This chapter lists the DLPC900 control commands. The following sections list the supported control commands of the DLPC900. In the Type column, ‘wr’ type is writeable field through I C or USB write transactions. Data can also be read through I C or USB read transactions for ‘wr’...
When the DLPC900 is combined with a DLP6500, this bit will be 0. When two DLPC900 controllers are combined with a DLP9000, this bit must be 1 for proper operation. If the bit is 0 and the DLPC900 is combined with a DLP9000, indicates a malfunction in one or both controllers.
Page 11
Video Frozen Flag 0 = Video is running (Normal frame change) 1 = Video is frozen (Displaying single frame) Reserved Retrieve Firmware Version This command reads the version information of the DLPC900 firmware. Command Read 0x0205 0x11 Table 11. Get Version Command Definition...
Page 12
17-254 Not defined Internal Error 1.5.2 Read Error Description This command retrieves the error descriptive string from the DLPC900 of the last executed command. The string is composed of character bytes ending with a null termination character. Command Read 0x0101 0x33 Table 13.
The Programming commands manage downloading a new firmware image into flash memory. This can be done over I C or USB interfaces. The commands in the DLPC900 Programming Commands section are only valid in program mode except for Enter Program Mode (I C: 0x30 or USB 0x3001), which exits normal mode and enters program mode.
Page 16
This command stops the given controller from executing any further commands until enabled by the same command. This command is intended to be used when two DLPC900 controllers are combined with one DLP9000 DMD, where one controller is the master and the other is the slave.
Page 17
3.1.1 Power Mode The Power Control places the DLPC900 in a standby state and powers down the DMD interface. Standby mode should only be enabled after all data for the last frame to be displayed has been transferred to the DLPC900.
Page 18
7 - Reserved Reserved Input Source Commands The Input Source Selection determines the input source for the DLPC900 data display. 3.3.1 Port and Clock Configuration This command selects which port the RGB data is on and which pixel clock, data enable, and syncs to use.
Page 19
3.3.2 Input Source Configuration The Input Source Configuration command selects the input source to be displayed by the DLPC900: 30-bit parallel port, Internal Test Pattern or flash memory. After executing this command, the host may poll the system status using I C commands: 0x20, 0x21, and 0x22, or the respective USB commands: 0x1A0A, 0x1A0b, and 0x1A0C.
Chipset Control Commands www.ti.com Image Flip The DLPC900 supports long- and short-axis image flips to support rear- and front-projection, as well as, table- and ceiling-mounted projection. NOTE: If showing image from Flash, load image (I C: 0x7F, USB: 0x1A39), this must be called to update the image flip setting.
Page 24
LED specifications, selected display mode, and so forth). Therefore, the recommended and absolute-maximum settings vary greatly. 3.5.1 LED Enable Outputs The DLPC900 offers three sets of pins to control the LED enables: • LEDR_EN for the red LED • LEDG_EN for the green LED •...
LED driver design and thus varies by design. GPIO Commands DLPC900 offers 9 general-purpose input/output pins (GPIO). Some of these pins can be configured for PWM output, PWM input, or clock output functionality. By default, all pins are configured as GPIO inputs.
Page 27
0xFF:0x80 = Reserved Pulse Width Modulated (PWM) Control DLPC900 provides four general-purpose PWM channels that can be used for a variety of control applications, such as fan speed. If the PWM functionality is not needed, these signals can be programmed as GPIO pins.
Page 28
The set of commands are created and saved in a text file. The text file then becomes an additional part of the firmware and updated into the flash memory. The user can also specify a default batch file that the DLPC900 will execute during its power-up sequence. 3.8.1 Batch File Name This is a read command that returns the name of the given batch file index.
Page 30
0x04 FLIP_LONG: 0x01 Display Mode Commands The DLPC900 display consists of several parameters which dictate the loading of the DMD and the control of PWM to the LEDs. The DLPC900 supports four main display modes: • Normal Video mode •...
Page 31
Numbers are based on uncompressed patterns. In Normal Video mode, the DLPC900 operates on a per-frame basis where it takes the input data and appropriately allocates it in a frame. For example, a 24-bit RGB input image is allocated into a 60-Hz frame by dividing each color (red, green, and blue) into specific percentages of the frame.
With binary pulsewidth modulation, the intensity level of the color is reproduced by controlling the amount of time the mirror is on. For a 24-bit RGB frame image inputted to the DLPC900 controller, the DLPC900 controller creates 24 bit-planes, stores them in internal embedded DRAM, and sends them to the DMD, one bitplane at a time.
Page 33
Maximum 1080 or 1600. Pattern Display Commands In pattern display modes 0,2, and 3, the DLPC900 supports 1-, 2-, 3-, 4-, 5-, 6-, 7-, and 8-bit images with a 1080p or WQXGA pixel resolution streamed through the 24-bit RGB parallel interface, pre-stored patterns in the flash memory, or dynamically with Pattern On-The-Fly.
Page 34
0x1A24 before calling these commands. 4.2.1 Trigger Commands To synchronize a camera with the displayed patterns, the DLPC900 supports three pattern modes: • Video Pattern Mode (applicable when pattern data from RGB parallel port): – VSYNC used as trigger input.
Page 38
4.2.3.2 Pattern Display Invert Data The Pattern Display Invert Data command dictates how the DLPC900 interprets a value of 0 or 1 to control mirror position for displayed patterns. Before executing this command, stop the current pattern sequence. Once the command has been sent to the DLPC900, the Pattern Display LUT Definition for all the patterns must be re-sent to the DLPC900.
Page 40
The images should be loaded in the reverse order. Suppose there are 3 images 0,1 and 2 then the order for loading the image is 2, 1 and 0. When the DLPC900 is combined with a DLP9000 DMD, the user must perform the same operation on both the master and slave controllers by choosing the appropriate command in the command table.
Page 41
This command is used for updating the pattern images on-the-fly. This loads the full compressed 24bit BMP images into the internal memory of the DLPC900. This command is issued after the Init pattern BMP command and multiple times until all the bytes are sent. Images should be compressed using Run-Length...
Detailed power-up timing is given in the DLPC900 data sheet, DLPS037. Power Down No commands are required at power down of the DLPC900. The DC power supplies must be turned off, and PWRGOOD must be set low, according to the timing in the DLPC900 data sheet, DLPS037.
Page 46
C Pass Through Write Example The following table lists the steps to communicate with an external device using one of the DLPC900 I ports. The example shows how to write 16 bytes to an EEPROM starting at address location 16.
Page 53
In order to minimize Flash storage requirements, it is recommended (but not required) that pattern images be stored in a compressed format. The compression format supported by the DLPC900 is a subset of BMP Run-Length Encoding (RLE). The DLPC900 is able to perform the decompression of pattern images as they are loaded from external flash or when using Pattern On-The-Fly mode to its internal memory.
Page 54
2-line packed 24-bit compressed bitmap. The compressed data on the left is stored sequentially in Flash memory. The DLPC900 firmware automatically expands the data as shown on the right which is store in internal memory.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
Need help?
Do you have a question about the DLPC900 and is the answer not in the manual?
Questions and answers