Usci Block Diagram – Spi Mode - Texas Instruments MSP430x5 series User Manual

USCI Introduction – SPI Mode
UCSSELx
N/A 00
ACLK 01
SMCLK 10
BRCLK
SMCLK 11
970
Universal Serial Communication Interface – SPI Mode
Receive State Machine
Receive Buffer UC xRXBUF
Receive Shift Register
UCMSB UC7BIT
Bit Clock Generator
UCxBRx
16
Prescaler/Divider
UCMSB UC7BIT
Transmit Shift Register
Transmit Buffer UC xTXBUF
Transmit State Machine
Figure 37-1. USCI Block Diagram – SPI Mode
Copyright © 2008–2018, Texas Instruments Incorporated
UCLISTEN
0
1
UCCKPH UCCKPL
Clock Direction,
Phase and Polarity
UCMODEx
2
Transmit Enable
Control
SLAU208Q – June 2008 – Revised March 2018
www.ti.com
Set UCOE
Set UCxRXIFG
UCMST
UCxSOMI
1
0
UCxCLK
UCxSIMO
UCxSTE
Set UCFE
Set UCxTXIFG
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