Table 4. Udimm Support Guidelines - Intel S2400SC Technical Product Specification

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Intel® Server Board S2400SC TPS
o DRAM Single Device Data Correction (SDDC) for any single x4 or x8 DRAM
device. Independent channel mode supports x4 SDDC. x8 SDDC requires
lockstep mode
o Lockstep mode where channels 0 & 1 and channels 2 & 3 are operated in
lockstep mode
o Data scrambling with address to ease detection of write errors to an incorrect
address.
o Error reporting from the Machine Check Architecture
o Read Retry during CRC error handling checks by iMC
o Channel mirroring within a socket
-
-
o Error Containment Recovery
Improved Thermal Throttling with dynamic Closed Loop Thermal Throttling (CLTT)
Memory thermal monitoring support for DIMM temperature
3.2.2.1
Supported Memory
Ranks
Per
DIMM &
Memory Capacity Per DIMM1
Data
Width
SRx8
Non-
1GB
2GB
ECC
DRx8
Non-
2GB
4GB
ECC
SRx16
Non-
512MB
1GB
ECC
SRx8
1GB
2GB
ECC
DRx8
2GB
4GB
ECC
Notes:
1.
Supported DRAM Densities are 1Gb, 2Gb and 4Gb. Only 2Gb and 4Gb are validated by Intel.
2.
Command Address Timing is 1N for 1DPC and 2N for 2DPC.
3.
For Memory Population Rules, please refer to the Romley Platform Design Guide.
Revision 2.0
CPU1 Channel Mirror Pairs B and C
CPU2 Channel Mirror Pairs E and F

Table 4. UDIMM Support Guidelines

1 Slot per Channel
1DPC
1.35V
4GB
n/a
1066, 1333,
8GB
n/a
1066, 1333,
2GB
n/a
1066, 1333,
1066,
4GB
1066, 1333,
1333
1066,
8GB
1066, 1333,
1333
Supported and Validated
Supported but not Validated
Intel order number G36516-002
Speed (MT/s) and Voltage Validated by
Slot per Channel (SPC) and DIMM Per Channel (DPC)2,3
1DPC
1.5V
1.35V
n/a
1066, 1333
n/a
1066, 1333
n/a
1066, 1333
1066,
1066, 1333
1333
1066,
1066, 1333
1333
Functional Architecture
2 Slots per Channel
2DPC
1.5V
1.35V
1.5V
n/a
1066
n/a
1066
n/a
1066
1066
1066
1066
1066
23

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