System Management Bus (Smbus* 2.0); Intel ® Active Management Technology (Intel ® Amt); Integrated Nvsram Controller; Vt-D) - Intel S2400SC Technical Product Specification

Functional Architecture
3.3.17

System Management Bus (SMBus* 2.0)

The C600 chipset contains a SMBus* Host interface that allows the processor to communicate
with SMBus* slaves. This interface is compatible with most I2C devices. Special I2C commands
are implemented. The C600 chipset's SMBus* host controller provides a mechanism for the
processor to initiate communications with SMBus* peripherals (slaves). Also, the C600 chipset
supports slave functionality, including the Host Notify protocol. Hence, the host controller
supports eight command protocols of the SMBus* interface (see System Management Bus
(SMBus*) Specification, Version 2.0): Quick Command, Send Byte, Receive Byte, Write
Byte/Word, Read Byte/Word, Process Call, Block Read/Write, and Host Notify.
The C600 chipset's SMBus* also implements hardware-based Packet Error Checking for data
robustness and the Address Resolution Protocol (ARP) to dynamically provide address to all
SMBus* devices.
3.3.18 Intel Active Management Technology (Intel
®
®
Intel Active Management Technology (Intel
manageability using the wired network. Intel AMT is a set of advanced manageability features
developed as a direct result of IT customer feedback gained through Intel market research. With
the new implementation of System Defense in C600 chipset, the advanced manageability
feature set of Intel AMT is further enhanced.
3.3.19

Integrated NVSRAM Controller

The C600 chipset has an integrated NVSRAM controller that supports up to 32KB external
device. The host processor can read and write data to the NVSRAM component.
3.3.20 Intel Virtualization Technology for Direct I/O (Intel
®
The C600 chipset provides hardware support for implementation of Intel
Technology with Directed I/O (Intel
support the virtualization of platforms based on Intel
Technology enables multiple operating systems and applications to run in independent
partitions. A partition behaves like a virtual machine (VM) and provides isolation and protection
across partitions. Each partition is allocated its own subset of host physical memory.
3.3.21

JTAG Boundary-Scan

The C600 chipset adds the industry standard JTAG interface and enables Boundary-Scan in
place of the XOR chains used in previous generations of chipsets. Boundary-Scan can be used
to ensure device connectivity during the board manufacturing process. The JTAG interface
allows system manufacturers to improve efficiency by using industry available tools to test the
C600 chipset on an assembled board. Since JTAG is a serial interface, it eliminates the need to
create probe points for every pin in an XOR chain. This eases pin breakout and trace routing
and simplifies the interface between the system and a bed-of-nails tester.
3.3.22

KVM/Serial Over LAN (SOL) Function

These functions support redirection of keyboard, mouse, and text screen to a terminal window
on a remote console. The keyboard, mouse, and text redirection enables the control of the client
38
®
AMT) is the next generation of client
®
VT-d). Intel VT-d consists of technology components that
®
Architecture Processors. Intel VT-d
Intel order number G36516-002
Intel® Server Board S2400SC TPS
AMT)
®

VT-d)

®
®
Virtualization
Revision 2.0