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clk
rst
bar_100_75n
enable
patho
blank
no_color
sgmt_frame
tx_std
tx_format
dl_mapping
ntsc_paln
dout
dout_valid
trs
ln
dout_b
dout_valid_b
trs_b
ln_b
vpid_byte1
vpid_byte2
vpid_byte3
®
®
Intel
Arria
10 SDI II IP Core Design Example User Guide
38
Video Pattern Generator Signals
Input
1
Input
1
Input
1
Input
1
Input
1
Input
1
Input
1
Input
1
Input
3
Input
4
Input
1
Input
1
Output
20*S
Output
1
Output
1
Output
11*S
Output
20*S
Output
1
Output
1
Output
11*S
Input
8*N
Input
8*N
Input
8*N
2 SDI II Design Example Detailed Description
Clock signal. This clock must be connected to the
input signal on TX/Du top.
tx_vid_clkout
Reset signal. This reset signal should be synchronized
with the
clock signal from the TX/Du
tx_vid_clkout
top.
Enable this signal to generate 100% color-bar pattern.
Disable to generate 75% color-bar pattern.
This signal acts as a data valid signal to this module. This
signal should be connected to the
signal from the TX/Du top.
Enable this signal to generate pathological pattern.
Enable this signal to generate blank signal.
Enable this signal to generate bar with no color.
Enable this signal to generate payload ID for segmented
frame video format when generating 1080i50 or 1080i60
video.
Indicates the desired transmit video standard. This input
signal must match
tx_vid_std
Indicates the desired transmit video format.
Enable this signal to generate data streams with dual-
link mapping.
Note: Applicable only for HD dual link or 3G Level B
dual link video standard.
Enable this signal to generate payload ID for fractional
frame rate video format. Disable to generate integer
frame rate video format.
Data output signal to be connected to the
input signal on the TX/Du top.
Data valid output signal to be connected to the
input signal on the TX/Du top.
tx_vid_datavalid
TRS output signal to be connected to the
input signal on the TX/Du top.
Line number output signal to be connected to the
input signal on the TX/Du top.
sdi_tx_ln
Data output signal for link B (HD dual link).
Data valid output signal for link B (HD dual link).
TRS output signal for link B (HD dual link).
Line number output signal to be connected to the
input signal on the TX/Du top.
sdi_tx_ln_b
The payload ID output signal to be connected to
input signal on TX/Du top.
sdi_tx_vpid_byte1
The payload ID output signal to be connected to
input signal on TX/Du top.
sdi_tx_vpid_byte2
The payload ID output signal to be connected to
input signal on TX/Du top.
sdi_tx_vpid_byte3
UG-20076 | 2017.05.08
sdi_tx_datavalid
on the TX/Du top.
tx_vid_data
tx_vid_trs
continued...
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