Dram Configuration - VIA Technologies EPIA-M920 User Manual

6.7.1. DRAM Configuration

The DRAM Configuration screen has two features for controlling the system
DRAM. All other DRAM features are automated and cannot be accessed.
Figure 61 Figure Figure Figure 61 61 61: Illustration of DRAM Configuration screen : Illustration of DRAM Configuration screen : Illustration of DRAM Configuration screen : Illustration of DRAM Configuration screen
6.7.1.1. DRAM Clock 6.7.1.1. DRAM Clock
6.7.1.1. 6.7.1.1. DRAM Clock DRAM Clock
The DRAM Clock option enables the user to determine how the BIOS handles
the memory clock frequency. The memory clock can either be dynamic or
static. This feature has eleven options.
By SPD By SPD
By SPD By SPD
By SPD option enables the BIOS to select a compatible clock frequency for
the installed memory.
400 MHz 400 MHz
400 MHz 400 MHz
The 400 MHz option forces the BIOS to be fixed at 800 MHz for DDR3
memory modules.
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EPIA EPIA M920 M920 User Manual User Manual
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