VIA Technologies EPIA-M920 User Manual page 10

Figure 30: LPC pin header.............................................................................................. 33
Figure 31: SPDIF connector ........................................................................................... 34
Figure 32: CMOS battery slot....................................................................................... 35
Figure 33: USB 3.0 connectors ..................................................................................... 36
Figure 34: CLEAR CMOS jumper ................................................................................. 37
Figure 35: SATA DOM voltage select jumper.......................................................... 38
Figure 36: COM1 and COM2 voltage select jumper .............................................. 39
Figure 37: COM3 and COM4 voltage select jumper .............................................. 40
Figure 38: VDD Power Select....................................................................................... 41
Figure 39: LVDS jumper settings .................................................................................. 42
Figure 40: DDR3 memory slots .................................................................................... 43
Figure 41: Inserting the memory module................................................................... 44
Figure 42: Locking the memory module .................................................................... 44
Figure 43: Disengaging the SODIMM locking clips ................................................. 45
Figure 44: Removing the memory module ................................................................ 45
Figure 45: PCI Express slot............................................................................................ 46
Figure 46: Suggested minimum chassis dimensions ................................................ 47
Figure 47: Suggested minimum internal chassis ceiling height (for dual core
model) ............................................................................................................................... 48
Figure 48: Suggested minimum internal chassis ceiling height (for quad core
model) ............................................................................................................................... 49
Figure 49: Suggested keepout areas ........................................................................... 50
Figure 50: Illustration of the Main menu screen....................................................... 53
Figure 51: Illustration of the Advanced Settings screen......................................... 55
Figure 52: Illustration of the ACPI Settings screen .................................................. 56
Figure 53: Illustration of S5 RTC Wake Settings screen.......................................... 57
Figure 54: Illustration of CPU Information screen.................................................... 58
Figure 55: Illustration of SATA Configuration screen ............................................. 59
Figure 56: Illustration of F71869 Super IO Configuration screen......................... 60
Figure 57: Illustration of F71869 H/W Monitor screen ........................................... 61
Figure 58: Illustration of Clock Generator Configuration screen ......................... 62
Figure 59: Illustration of On Board Configuration screen ...................................... 63
Figure 60: Illustration of Chipset Settings screen..................................................... 65
EPIA- - - - M920 EPIA M920 User Manual User Manual
EPIA EPIA M920 M920 User Manual User Manual
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