Freescale Semiconductor MPC8358E Hardware Specificftion page 55

Parameter
Clock to output valid
Output hold from clock
Clock to output high impedance
Input setup to clock
Input hold from clock
Notes:
1. The symbols used for timing specifications herein follow the pattern of t
for inputs and t
(first two letters of functional block)(reference)(state)(signal)(state)
(PC) with respect to the time the input signals (I) reach the valid state (V) relative to the PCI_SYNC_IN clock, t
(K) going to the high (H) state or setup time. Also, t
(R) went high (H) relative to the frame signal (F) going to the valid (V) state.
2. See the timing measurement conditions in the PCI 2.2 Local Bus Specifications .
3. For purposes of active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
4. Input timings are measured at the pin.
5. In rev. 2.0 silicon, due to errata, t
Figure 36 provides the AC test load for PCI.
Figure 37 shows the PCI input AC timing conditions.
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
Freescale Semiconductor
Table 48. PCI AC Timing Specifications at 33 MHz
PCRHFV
minimum is 1 ns. Refer to Errata PCI17 in Chip Errata for the MPC8360E, Rev. 1 .
PCIXKH
= 50 Ω
Output
Z
0
Figure 36. PCI AC Test Load
CLK
t
PCIVKH
Input
Figure 37. PCI Input AC Timing Measurement Conditions
1
Symbol Min
t —
PCKHOV
t 2
PCKHOX
t —
PCKHOZ
t 7.0
PCIVKH
t 0.3
PCIXKH
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
symbolizes PCI timing (PC) with respect to the time hard reset
= 50 Ω
R
L
t
PCIXKH
Max Unit Notes
11 ns
— ns
14 ns
— ns
— ns 2, 4, 5
symbolizes PCI timing
PCIVKH
, reference
SYS
OV /2
DD
PCI
2
2
2, 3
2, 4
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