Document Revision History - Freescale Semiconductor MPC8358E Hardware Specificftion

Powerquicc ii pro processor revision 2.x tbga silicon
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Table 81
shows the SVR settings by device and package type.

26 Document Revision History

Table 82
provides a revision history for this hardware specification.
Rev.
Date
Number
4
01/2011
• Updated references to the LCRR register throughout
• Removed references to DDR DLL mode in
Specifications."
• Changed "Junction-to-Case" to "Junction-to-Ambient" in
Junction-to-Ambient Thermal
Resistance of TBGA Package," titles.
3
03/2010
• Changed references to RCWH[PCICKEN] to RCWH[PCICKDRV].
• In
Table
• Added
• In
Figure
removed watermark.
• Updated the title of
• In
Table
• In
Table 27–Table
20–80% and 80–20% of the voltage supply, respectively.
• In
Table 38,
• In
Table
• In
Table
note 7: "This pin must always be tied to GND" to the TEST pin and added a note to SPARE1 stating: "This
pin must always be left not connected."
• In
Section 4, "Clock Input
• Added
• Updated
• In
Section 21.3, "Pinout
PowerQUICC Design Checklist,' for proper pin termination and usage."
• In
Section 22,
or CLKIN/2 is driven out on the PCI_CLK_OUTn signals."
• In
Section 22.1, "System PLL
• In
Table
2
12/2007 Initial release.
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
Freescale Semiconductor
Table 81. SVR Settings
Device
Package
MPC8360E
TBGA
MPC8360
TBGA
MPC8358E
TBGA
MPC8358
TBGA
Table 82. Revision History
Resistance," and
2, added extended temperature characteristics.
Figure
6, "DDR Input Timing Diagram."
53, "Mechanical Dimensions and Bottom Surface Nomenclature of the TBGA Package,"
Table
19,"DDR SDRAM Input AC Timing Specifications."
20, "DDR and DDR2 SDRAM Input AC Timing Specifications Mode," changed table subtitle.
30, and
Table 33—Table
"IEEE 1588 Timer AC Specifications," changed first parameter to "Timer clock frequency."
45, "I2C AC Electrical Specifications," changed units to "ns" for t
66, "MPC8360E TBGA Pinout Listing," and
Timing," added note regarding rise/fall time on QUICC Engine block input pins.
Section 4.3, "Gigabit Reference Clock Input
Section 8.1.1, "10/100/1000 Ethernet DC Electrical
Listings," added sentence stating "Refer to AN3097, 'MPC8360/MPC8358E
"Clocking," removed statement: "The OCCR[PCICDn] parameters select whether CLKIN
Configuration," updated the system VCO frequency conditions.
80, added extended temperature characteristics.
SVR
SVR
(Rev. 2.0)
(Rev. 2.1)
0x8048_0020
0x8048_0021
0x8049_0020
0x8049_0021
0x804A_0020
0x804A_0021
0x804B_0020
0x804B_0021
Substantive Change(s)
Section 6.2.2, "DDR and DDR2 SDRAM Output AC Timing
Section 23.2.4, "Heat Sinks and
Table
78, "Heat Sinks and Junction-to-Ambient Thermal
34, changed the rise and fall time specifications to reference
Table 67
"MPC8358E TBGA Pinout
Timing."
Characteristics."
Document Revision History
.
I2DVKH
Listing,
added
107

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