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I
FUNCTIONAL DESCRIPTION
When the MVMEl35/136 modul e is not confi gured as the system
controller and is not requesting VMEbus mastership, the delay from
BGXIN* low to BGXOUT* low is 45 nanoseconds typical
and
6~
nanoseconds maximum.
4.3 MC68020 MPU
The MC68020 is the main microprocessor of the MVMEI35/136.
The
MVMEI35/135A/136/136A versions utilize the MC68020 operating at a
fixed operating speed of 16.67 MHz. On the MVMEI35-1 version, the
fixed operating frequency is 20.00 MHz.
The MC68020 is a full 32-bit microprocessor with 32-bit registers,
32-bit data, and 32-bit addresses.
Its advanced architecture,
enhanced addressing modes, and on-chip cache are advancements over
its predecessors in the MC68000 family of chips. The 32-bit data and
address architecture of the MC68020 fully supports applications in
environments based on an asynchronous, non-multiplexed bus such as
the VMEbus.
The microprocessor includes control inputs and an
internal multiplexer that enable
it
to perform automatic port sizing
during each bus cycle.
Use of this mechanism facilitates the
transfer of one, two, or four byte operands to and from external
devices of any data port width effectively eliminating all alignment
restrictions.
Refer to the MC68020UM/AD User's Manual
for a
detailed description of its operation.
4.4 MC68881 FPCP
The MVMEI35/135A/136/136A versions are equipped with a 16.67 MHz
MC68881 Floating-Point Coprocessor. On the MVME135-1 version, the
MC68881 operates at 20.00 MHz.
The MC68881 extends the main MPU
integer data processing capabilities. It does this by providing a
very high performance binary floating-point arithmetic unit and a
set of floating-point data registers that are utilized in a manner
analogous to the use of the integer data registers.
The MC68881
instruction set is a natural extension to that of all earlier
members of the M68000 family, and supports all of the addressing
modes of the host MPU. Refer to the MC68881UM/AD User's Manual for a
detailed description of its operation.
4. S MC688S1 PMMU
Memory management for the MVME136 and MVME136A is provided by a
16.67 MHz MC68851. The MC68851 is a high performance Paged Memory
Management Unit (PMMU) designed to efficiently support a demand
paged
virtual
memory
environment
with
the
MC68020
32-bit
microprocessor.
The PMMU is optimized for very fast logical-to-
physical address translations, to provide a comprehensive access
control and protection mechanism, and to provide extensive support
for paged virtual systems.
Operating as a coprocessor to the
4-6
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