Motorola MVME135 User Manual page 48

32-bit
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FUNCTIONAL DESCRIPTION
CHAPTER 4 - FUNCTIONAL DESCRI PTION
4.1 INTRODUCTION
This chapter provides the overall block diagram level description
for the MVf1E135/136 module.
The general description provides an
overview of the module, followed by a detailed description of each
section of the module.
The simplified block diagram for the
MVMEI35/135-1/136
is
illustrated
in
Figure
4-1
and
for
the
MVMEl35A/136A in Figure 4-2.
4.2 GENERAL DESCR I PTI ON
The MVME135/136 is a MC68020 microprocessor-based module.
The
module
incorporates
an
MC68020,
a
32-bit
address
and
data
microprocessor,
a
high
level
multiprocessor
CSR.
and
1Mb
(MVME13 5/13 5 -1/136 vers i on s) or 4Mb (MVME 13 5A/ 136A vers i on s) of
fast DRAM.
Other features include a Paged Memory Management Unit
(PMMU). a Floating Point Coprocessor (FPCP),
an A32/D32 VMEbus
interface, a secondary bus interface (VSBbus), two RS-232C serial
ports. two 16-bit timers, two 28-pin ROM/PROM/EPROM sockets, VMEbus
system
controller
functions,
a
seven-level
VMEbus
interrupt
handler, and a dual
ported,
high-level
communication interface
call ed the Mul t i processor Control and Status Regi sters (MPCSR).
4.2.1 Data Bus Structure
The data bus structure on the MVME135/136 modul e is arranged to
accommodate the 8-bit, 16-bit, 32-bit. and 16/32-bit ports that
reside on the module.
The 8-bit ports are connected to data lines
D24 through D31 of the local bus, the 16-bit ports are connected to
data lines 016 through D31 of the local bus, and the 32-bit ports are
connected to data 1 i nes D00 through 031 of the local bus.
4.2.2 Memory Map
The operation of the map decoder and tables providing the main
memory maps of the MVME135/136 modules are provided in Chapter 3.
4.2.3 Timing
General characteristics of the MVME135j136 module timing are given
in the following sections and Table 4-1.
4.2.4 MVME135/135-1j136 DRAM Cycl e Times
MPU accesses to the on-board DRAM require a mlnlmum of three MPU
clock cycles.
A clock cycle at 16.67 MHz is 60 nanoseconds and at
20.00 MHz is 50 nanoseconds.
4-1
I

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